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SN65ALS1176 Datasheet(PDF) 6 Page - Texas Instruments |
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SN65ALS1176 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 12 page ![]() SN65ALS1176 DIFFERENTIAL BUS TRANSCEIVER SLLS295A – APRIL 1998 – REVISED DECEMBER 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going input threshold voltage VO = 2.7 V, IO = – 0.4 mA 0.2 V VIT – Negative-going input threshold voltage VO = 0.5 V, IO = 8 mA – 0.2‡ V Vhys Hysteresis voltage (VIT + – VIT –) 60 mV VIK Enable-input clamp voltage II = – 18 mA – 1.5 V VOH High level output voltage VID = 200 mV, IOH = – 400 µA, 27 V VOH High-level output voltage ID , See Figure 6 OH µ , 2.7 V VOL Low level output voltage VID = – 200 mV, IOL = 8 mA, 045 V VOL Low-level output voltage ID , See Figure 6 OL , 0.45 V IOZ High-impedance-state output current VO = 0.4 V to 2.4 V ±20 µA VI Line input current Other input = 0 V, VI = 12 V 1 mA VI Line input current , See Note 5 VI = – 7 V – 0.8 mA IIH High-level-enable input current VIH = 2.7 V 20 µA IIL Low-level-enable input current VIL = 0.4 V – 100 µA rI Input resistance 12 20 k Ω IOS Short-circuit output current VID = 200 mV, VO = 0 –15 –85 mA ICC Supply current No load Outputs enabled 23 30 mA ICC Supply current No load Outputs disabled 19 26 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE 5: This applies for both power on and power off. Refer to TIA/EIA-485-A for exact conditions. switching characteristics over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tpd Propagation time VID = – 1.5 V to 1.5 V, CL = 15 pF, 25 ns tsk(p) Pulse skew§ ID , See Figure 7 L , 0 2 ns tPZH Output enable time to high level 11 18 ns tPZL Output enable time to low level CL =15 pF See Figure 8 11 18 ns tPHZ Output disable time from high level CL = 15 pF, See Figure 8 50 ns tPLZ Output disable time from low level 30 ns † All typical values are at VCC = 5 V, TA = 25°C. § Pulse skew is defined as the |tPLH – tPHL| of each channel of the same device. |
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