SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B

DIFFERENTIAL BUS TRANSCEIVERS

SLLS040G – AUGUST 1987 – REVISED DECEMBER 1999

2

POST OFFICE BOX 655303

AVAILABLE OPTIONS

†

PACKAGED DEVICES

TA

tsk(lim)†

SMALL OUTLINE

(D) ‡

PLASTIC DIP

(P)

0

°C to 70°C

10

7.5

5

SN75ALS176D

SN75ALS176AD

SN75ALS176BD

SN75ALS176P

SN75ALS176AP

SN75ALS176BP

–40

°C to 85°C

15

SN65ALS176D

SN65ALS176P

† tsk(lim) This is the maximum range that the driver or receiver delay times vary

over temperature, VCC, and process (device to device).

‡ The D package is available taped and reeled. Add the suffix R to the device type

(e.g., SN75ALS176DR).

Function Tables

DRIVER

INPUT

ENABLE

OUTPUTS

D

DE

A

B

H

H

H

L

L

H

L

H

X

L

Z

Z

H = high level, L = low level, X = irrelevant,

Z = high impedance

RECEIVER

DIFFERENTIAL INPUTS

ENABLE

OUTPUT

A–B

RE

R

VID ≥ 0.2 V

L

H

– 0.2 V < VID < 0.2 V

L

?

VID ≤ – 0.2 V

L

L

X

H

Z

Inputs open

L

H

H = high level, L = low level, X = irrelevant,

Z = high impedance

R

D

RE

DE

1

4

2

3

EN2

EN1

B

A

7

6

2

1

1

§ This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

logic diagram (positive logic)

Bus

B

7

A

6

1

R

2

RE

3

DE

4

D