SN74LVC828A

10-BIT BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCAS347E – MARCH 1994 – REVISED JUNE 1998

1

POST OFFICE BOX 655303

CMOS) Submicron Process

All Ports (5-V Input/Output Voltage With

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

JESD 17

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages

description

The SN74LVC828A provides a high-performance bus interface for wide data paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2)

input is high, all ten outputs are in the high-impedance state. The SN74LVC828A provides inverting data at

its outputs.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVC828A is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUT

OE1

OE2

A

Y

L

L

L

H

L

LH

L

H

XX

Z

X

H

X

Z

Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

DB, DW, OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

OE1

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

GND

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

Y9

Y10

OE2