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APL0990.1 Datasheet(PDF) 1 Page - Advanced Semiconductor Business Inc. |
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APL0990.1 Datasheet(HTML) 1 Page - Advanced Semiconductor Business Inc. |
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1 / 1 page ![]() Plerow APL0990.1 PLL Module Features ・ + 5dBm Output Level at 990.1 MHz ・ Channel Step Size : 100 kHz ・ 2 nd Harmonic : < - 25dBc ・ Spurious Level : < - 70dBc ・ Lock Time : < 10 ms ・ 30mA Current Consumption ・ Strip-line Resonator Description The plerow TM PLL synthesizer module was designed for use in wireless and wireline systems in a wide range of frequency from 50 MHz to 6 GHz. ASB’s PLL provides ex- ceptionally low spurious and phase noise performance with fast locking time and low current consumption. All products are avail- able in a surface-mount type package. Specifications More Information Website: www.asb.co.kr E-mail: sales@asb.co.kr Tel: (82) 42-528-7220 Fax: (82) 42-528-7222 ASB Inc., 4th Fl. Venture Town Bldg., 367-17 Goijeong-Dong, Seo-Gu, Daejon 302-716, Korea Parameter Unit Min. Typical Max. Frequency Range MHz 980.1 990.1 1000.1 Output Power dBm 2 5 7 Supply Voltage V 4.7 5 5.3 Current Consumption mA 30 Channel Step Size kHz 100 2 nd Harmonics dBc -25 Spurious Level dBc -70 Lock Time ms 3 10 Reference Frequency MHz 10 Reference Input Level dBm -5 2 7 Phase Noise (C / N) @ 1 kHz -80 @ 10 kHz -103 @ 100 kHz dBc/Hz -120 Output Impedance Ω 50 Operating Temp. Range °C -40 25 85 Package Type & Size mm SMT, 19.0W ×19.0L×5.8H 1) Measurement conditions are as follows: T = 25 °C, V CC = 5.0 V, Freq. = 990.1 MHz, 50 ohm system. Outline Drawing Top View Bottom View Dimension (mm) A 19.0 B 19.0 C 5.8 D 1.5 E 0.5 F 1.75 G 1.35 H 15.0 I 0.9 Tolerance: ± 0.2 Pin Configuration 1 CLOCK 2 DATA 3 ENABLE 4 OSC IN 9 VCC (VCO) 13 RF OUT 15 VCP (PLL) 16 LOCK DETECT Others Ground D A E F I H G C B Side View 1/1 www.asb.co.kr December 2004 |
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