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TAS1020B Datasheet(PDF) 34 Page - Texas Instruments

Part # TAS1020B
Description  USB Streaming Controller
PDF  114 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS1020B Datasheet(HTML) 34 Page - Texas Instruments

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2–20
endpoint interrupt. If the MCU wishes to remain autonomous to the DMA process, the MCU must mask off
the MCU endpoint interrupt (by clearing the OEPIE bit in the USB out configuration register OEPCNFx)
before enabling the DMA process.
8.
When the DMA process completes, the DMA channel disables itself and issues a DMA0 or a DMA1 interrupt
to the MCU. Upon receiving the interrupt, the MCU knows that DMABPCT packets have been sent out to
the C-port. The MCU then enables the appropriate endpoint interrupt (if it had been previously masked off).
The process is now complete.
Direct Exchange Mode
This mode offers the highest bandwidth for bulk OUT transactions. The process is almost identical to the software
handshake mode, the only difference being that the Direct Exchange mode, once enabled, runs continuously until
disabled; whereas the Software handshake mode only remains active for the processing of DMABPCT packets. The
Direct Exchange mode is selected by clearing the bit HSKEN in the DMA channel control register (DMACTL0 and
DMACTL1). When the MCU enables the DMA process, after appropriately setting up the endpoint configuration
registers, the C-port configuration registers, and the DMA channel, the DMA process remains active until disabled
by the MCU. While the DMA channel is active, received packets continue to be retrieved from the appropriate endpoint
buffer and transferred to the C-port for transmission to the external device.
2.2.7.3.4 Bulk IN Transaction Using DMA
The TAS1020B does not support BULK IN using the DMA resources.
2.2.7.4 Isochronous Transfers
The TAS1020B supports isochronous data transfers both to and from the host PC. Devices that need to send or
receive data at a constant rate must use the isochronous transfer type rate if the bandwidth of the data exceeds the
USB bandwidth allotted to interrupt type transactions. IN endpoints 1 through 7 and OUT endpoints 1 through 7 can
all be configured as isochronous endpoints.
Isochronous transfers must include the use of a DMA channel; MCU-supported isochronous transfers are not
allowed. Since the TAS1020B has only two DMA channels, at any point in time only two isochronous transactions
can be concurrently supported by the TAS1020B.
To setup an isochronous IN or an isochronous OUT transaction, the MCU must initialize the appropriate IN or OUT
USB endpoint configuration block. For isochronous transactions, this entails programming the buffer size and buffer
base address, enabling the endpoint interrupt, setting the ISO bit (to flag that the endpoint is an isochronous
endpoint), clearing the NACK bit, and enabling the endpoint. When the ISO bit is set, the hardware configures the
buffer to be a single circular buffer (see Section 2.2.7.4.1), using the endpoint buffer size register I/OEPBSIZx and
buffer base address register I/O EPBBAXx. The size of the circular buffer is the size specified in I/OEPSIZx. (This
is not to be confused with the same value in I/OEPSIZx yielding two buffers of that size when the double buffer mode
is selected for control, interrupt, and bulk transactions.)
The TAS1020B DMA engine has two DMA channels. Each channel can be assigned to any IN or OUT endpoint that
has been configured as an isochronous endpoint. (As previously discussed, DMA channels can also be assigned to
bulk out endpoints). If an isochronous OUT endpoint receives data, the DMA channel assigned to the endpoint will
retrieve the data from the endpoint buffer and transfer it to the C-port for outputting to the external device. If a DMA
channel is assigned to an isochronous IN endpoint, the DMA channel transfers external device data received on the
C-port to the IN endpoint buffer.
Each DMA channel can only implement data flow between endpoint buffers and the C-port. The configuration of each
DMA channel includes a 14-bit field that defines which of the up to 14 time slots in the C-port audio frame the DMA
channel supports. Both DMA channels could thus service OUT endpoints, or IN endpoints, with each DMA channel
supporting different time slots in the audio frame.
Each DMA channel also provides a current buffer count register (DMABCNT0/1). For isochronous OUT transactions,
the count in the register represents the number of bytes being transferred from the OUT endpoint buffer to the C-port



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