2–10

The CS input must make a low to high transition in order to specify a new control register address. When

the CS input is set to 1, the serial command data output (CDOUT) is placed in a high-impedance state. When

the CS input is cleared to 0, the CDOUT output is held low during nonvalid data intervals.

The serial control port is activated when the CS signal (active low) goes low. The CS line must be low prior

to data transactions and must remain low for the duration of the transaction. The serial command data input

(CDIN) is sampled on the rising edge of SCLK. The CDIN data is MSB first and unsigned. While the CS input

is low, the SCLK input must idle high when there is no valid data to be transferred. The first byte of CDIN

data after CS activation is set up as a serial control command. The serial control command includes a 4-bit

control register address [D(3–0)] and a control port direction bit (D7). The second byte of data is set up as

control register data. The CS input must make a low-to-high transition in order to specify a new control

register address. When the CS input goes high, the serial command data output (CDOUT) is placed in a

high-impedance state. When the CS input goes low, the CDOUT output is held low during nonvalid data

intervals.

D7

D6

D5

D4

D3

D2

D1

D0

D7

D6

D5

D4

D3

D2

D1

D0

D7

D6

D5

D4

D3

D2

D1

D0

MSB

LSB

Serial Control Command

MSB

LSB

Serial Data

SCLK

CS

CDIN

CDOUT

Figure 2–5. Serial Interface Timing

2.5.2

Serial Control Command Format

The serial control command format is shown below.

D7

D6

D5

D4

D3

D2

D1

D0

WR

Unused

ADDR(3–0)

The serial control command fields are defined as:

WR – Serial interface direction

When this bit is 1:

•

The serial interface is in write mode.

•

Serial data is sent control register specified in the serial control command

When this bit is 0:

•

The serial interface is in read mode.

•

The control register data is output to CDOUT according to the control register address.

ADDR(3–0) – Control register address specifies the TLC320AD80 register being accessed.