TLC540I, TLC541I

8-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL AND 11 INPUTS

SLAS065A – OCTOBER 1983 – REVISED MARCH 1995

3

POST OFFICE BOX 655303

operating sequence

ADDRESS

INPUT

Hi-Z

B7

B0

B1

B2

B3

B4

B5

B6

B7

C3 C2

C1

C0

LSB

MSB

Conversion Data B

MSB

MSB

LSB

Hi-Z State

Don’t Care

MSB

LSB

MSB

(See Note B)

A7

A7

A6 A5

A4 A3

A2

A1

A0

State

LSB

B0

B1

B2

MSB

B3

Don’t

Care

1

1

Sample

Cycle C

Access

Cycle C

See Note A

tconv

Sample

Cycle B

Access

Cycle B

(see Note C)

88

7

6

5

4

3

2

7

6

5

4

3

2

I/O

CLOCK

CS

DATA

OUT

Don’t Care

twH(CS)

Previous Conversion Data A

NOTES: A. The conversion cycle, which requires 36 system clock periods, is initiated on the 8th falling edge of I/O CLOCK after CS goes low

for the channel whose address exists in memory at that time. If CS is kept low during conversion, I/O CLOCK must remain low

for at least 36 system clock cycles to allow conversion to be completed.

B. The most significant bit (MSB) will automatically be placed on the DATA OUT bus after CS is brought low. The remaining seven

bits (A6 – A0) will be clocked out on the first seven I/O CLOCK falling edges.

C. To minimize errors caused by noise at CS, the internal circuitry waits for three system clock cycles (or less) after a chip select

falling edge is detected before responding to control input signals. Therefore, no attempt should be made to clock-in address data

until the minimum chip-select setup time has elapsed.

6.5 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak input current range (any input)

±10 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak total input current (all inputs)

±30 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

– 40

°C to 85°C

. . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Case temperature for 10 seconds: FN package

260

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package

260

°C

. . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to digital ground with REF– and GND wired together (unless otherwise noted).