TLC5628C, TLC5628I

OCTAL 8-BIT DIGITAL-TO-ANALOG CONVERTERS

SLAS089E – NOVEMBER 1994 – REVISED APRIL 1997

2

POST OFFICE BOX 655303

functional block diagram

Serial

Interface

× 2

DAC

DAC

× 2

× 2

DAC

DAC

× 2

LDAC

REF1

+

–

+

–

+

–

+

–

+

–

+

–

REF2

CLK

DATA

LOAD

DACA

DACD

DACE

DACH

9

8

8

8

8

Latch

Latch

Latch

Latch

Latch

Latch

Latch

Latch

Power-On

Reset

14

11

5

4

12

13

2

15

7

10

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

CLK

5

I

Serial interface clock. The input digital data is shifted into the serial interface register on the falling edge of the clock

applied to the CLK terminal.

DACA

2

O

DAC A analog output

DACB

1

O

DAC B analog output

DACC

16

O

DAC C analog output

DACD

15

O

DAC D analog output

DACE

7

O

DAC E analog output

DACF

8

O

DAC F analog output

DACG

9

O

DAC G analog output

DACH

10

O

DAC H analog output

DATA

4

I

Serial interface digital data input. The digital code for the DAC is clocked into the serial interface register serially.

Each data bit is clocked into the register on the falling edge of the clock signal.

GND

3

I

Ground return and reference terminal

LDAC

13

I

Load DAC. When LDAC is high, no DAC output updates occur when the input digital data is read into the serial

interface. The DAC outputs are only updated when LDAC is taken from high to low.

LOAD

12

I

Serial interface load control. When LDAC is low, the falling edge of the LOAD signal latches the digital data into

the output latch and immediately produces the analog voltage at the DAC output terminal.

REF1

14

I

Reference voltage input to DAC A

BCD. This voltage defines the analog output range.

REF2

11

I

Reference voltage input to DAC E

FGH. This voltage defines the analog output range.

VDD

6

I

Positive supply voltage