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TLC5905PAP Datasheet(PDF) 17 Page - Texas Instruments

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Part # TLC5905PAP
Description  LED DRIVER
PDF  27 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLC5905PAP Datasheet(HTML) 17 Page - Texas Instruments

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TLC5905
LED DRIVER
SLLS401 – NOVEMBER 1999
17
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
OVM (output voltage monitor) function (continued)
output signal check for XDOWN1, XDOWN2
XDOWN1 or XDOWN2 can be forced to a low level by setting the appropriate latch value for OVM. This allows
investigation of the correct connection of XDOWN1 or XDOWN2 to the external system. Since both XDOWN1
and XDOWN2 terminal are open-collector outputs, outputs of multiple ICs are brought together.
OVM comparator setting
Setting the OVM latch is shown in Table 5. Note that the comparison voltage is set to the default value of 0.3 V
when MCENA tied to a low level.
Table 5. OVM Setting
MONITOR CONTROL DATA
COMPARISON
XDOWN1
XDOWN2
MSB
LSB
VOLTAGE
XDOWN1
XDOWN2
0000
NO COMPARISON
DEPEND ON TSD/WDT
HI–Z
0001†
0.3 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
0010
0.4 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
0011
0.5 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
0100
0.6 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
0101
0.7 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
0110
0.8 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
0111
0.9 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1000
1.0 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1001
1.1 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1010
1.2 V
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1011
1/3
× VCC(ANA)
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1100
1/2
× VCC(ANA)
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1101
2/3
× VCC(ANA)
DEPEND ON TSD/WDT
DEPEND ON OVM COMPARATOR
1110
0.3 V
L
DEPEND ON OVM COMPARATOR
1111
0.3 V
DEPEND ON TSD/WDT
L
† MCENA is low.
SOUT output timing selection
The timing for the SOUT output can be switched by selecting the SOMODE level. When SOMODE is low, SOUT
is clocked out synchronizing to the rising edge of SCLK. When SOMODE is high, SOUT is clocked out
synchronizing to the falling edge of SCLK. When the shift operation with SOMODE high, data can be protected
from shift error even if the SCLK signal is buffered in serial externally. In this case, when ICs are connected in
cascade, the maximum data transfer speed will be slower than the case of SOMODE low.
protection
This device incorporates WDT and TSD functions. If the WDT or TSD is turned on, then the constant current
output is stopped and XDOWN1 goes low. Therefore, by monitoring XDOWN1 terminal, these failures can be
detected immediately. Since the XDOWN1 output is configured as an open collector, outputs of multiple ICs are
brought together.



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