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TLC876IPW Datasheet(PDF) 4 Page - Texas Instruments |
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TLC876IPW Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 23 page ![]() TLC876M, TLC876I, TLC876C 10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS SLAS140D – JULY 1997 – REVISED MAY 2000 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION AGND 1, 19 Analog ground AIN 27 I Analog input AVDD 28 5-V analog supply CLK 15 I Clock input CML 26 O Bypass for an internal bias point. Typically a 0.1 µF capacitor minimum is connected from this terminal to ground. DGND 14, 20 Digital ground DVDD 18 5-V digital supply DRVDD 2 3.3-V/5-V digital supply. Supply for digital input and output buffers. DRGND 13 3.3-V/5-V digital ground. Ground for digital input and output buffers. D0 –D9 3–12 O Digital data out. D0:LSB, D9:MSB OE 16 I Output enable. When OE = low or NC, the device is in normal operating mode. When OE = high, D0–D9 are high impedance. REFBF 24 I Reference bottom force REFBS 25 I Reference bottom sense REFTF 22 I Reference top force REFTS 21 I Reference top sense STBY 17 I Standby enable. When STBY = low or NC, the device is in normal operating mode. When STBY = high, the device is in standby mode. |
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