TLV1562

2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL

CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN

SLAS162 – SEPTEMBER 1998

39

POST OFFICE BOX 655303

APPLICATION INFORMATION

1000000000

0111111111

0000000010

0000000001

0000000000

1111111110

0

0.0096

2.4528

2.4576

2.4624

1000000001

1111111101

1111111111

4.9056

4.9104

4.9152

512

511

2

1

0

1022

513

1021

1023

VI – Analog Input Voltage – V

VZT = VZS + 1/2 LSB

VZS

See Notes A and B

0.0048

VFT = VFS – 1/2 LSB

VFS

NOTES: A. This curve is based on the assumption that Vref + and Vref – have been adjusted so that the voltage at the transition from digital 0

to 1 (VZT) is 0.0024 V and the transition to full scale (VFT) is 4.908 V. 1 LSB = 4.8 mV.

B. The full-scale value (VFS) is the step whose nominal midstep value has the highest absolute value. The zero-scale value (VZS) is

the step whose nominal midstep value equals zero.

Figure 39. Ideal 12-Bit ADC Conversion Characteristics