TLV320AD12A

3.3-V INTEGRATED ADSL CODEC

SLWS088B – JULY 1999 – REVISED MARCH 2000

3

POST OFFICE BOX 655303

Terminal Functions

TERMINAL

I/O†

DESCRIPTION

NAME

NO.

I/O†

DESCRIPTION

ADR0

ADR1

54

55

I

Serial-port chip ID address. ADR0 is the least significant bit.

AVDD_ADC

12

I

Analog-to-digital converter (ADC) analog power supply

AVDD1_TX

66

I

TX-channel analog power supply 1

AVDD2_TX

70

I

TX-channel analog power supply 2

AVDD_FIL_RX

93

I

RX-channel filter analog power supply

AVDD_FIL_TX

83

I

TX-channel filter analog power supply

AVDD_REF

86

I

Reference analog power supply

AVSS_ADC

13

I

ADC analog ground

AVSS1_TX

67

I

TX-channel analog ground 1

AVSS2_TX

71

I

TX-channel analog ground 2

AVSS_FIL_RX

94

I

RX-channel filter analog ground

AVSS_FIL_TX

84

I

TX-channel filter analog ground

AVSS_REF

87

I

Reference analog ground

CLKIN

42

I

35.328-MHz external oscillator clock input

CLKOUT

41

O

4.416-MHz clock output

COMPA_TX

68

I

TX-channel decoupling capacitor input A (add 500 pF X7R ceramic capacitor to AVDD1_TX)

COMPB_TX

69

I

TX-channel decoupling capacitor input B (add 1-

µF X7R ceramic capacitor to AVDD1_TX)

CS

51

I

Parallel-port chip select

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

34

33

32

31

30

29

28

25

24

23

22

21

20

19

18

17

I/O

(MSB)

Parallel-port data. D0 is the least significant bit.

(LSB)

DVDD_BF

26

I

Digital I/O buffer power supply

DVDD_CLK

44

I

Digital clock power supply

DVDD_DAC

57

I

Digital power supply for digital-to-analog converter (DAC)

DVDD_LG

47

I

Digital logic power supply

DVDD_RX

15

I

Digital power supply for RX channel

DVSS

9, 58

I

Digital ground

DVSS_BF

27

I

Digital I/O buffer ground

DVSS_CLK

43

I

Digital clock ground

DVSS_DAC

56

I

Digital ground for DAC

DVSS_LG

46

I

Digital logic ground

† I = input, O = output, I/O = 3-state input/output