September 2006

PCS3P7101A

rev 0.1

Notice: The information in this document is subject to change without notice.

Low Power Peak EMI Reducing clock synthesizer

3 of 7

DC Electrical Characteristics

Symbol

Parameter

Min

Typ

Max

Unit

Input low voltage

VSS - 0.3

-

0.8

V

Input high voltage

2.0

-

VDD + 0.5

V

Input low current

-

-

-35

µA

Input high current

-

-

35

µA

-

-

0.4

V

2.4

-

-

V

Static supply current*

-

50

_

uA

Dynamic supply current (3.3V, 25MHz and no load)

-

TBD

-

VDD

Operating voltage

3.15

3.3

3.45

V

Output impedance

-

20

-

Ω

Input Capacitance

-

4

-

pF

PD

-

250

-

KΩ

Internal pull-up resistor

CLK output

-

525

-

kΩ

* XIN/CLKIN pin and PD pin are pulled low

AC Electrical Characteristics for 3.3V Supply

Symbol

Parameter

Min

Typ

Max

Unit

CLKIN/XIN

Input frequency

-

25

-

MHz

ModOUT

Output frequency

-

100

-

MHz

Output rise time (measured from 0.8 to 2.0V)

-

1

-

nS

Output fall time (measured at 2.0V to 0.8V)

-

1

-

nS

Power-up time( PLL lock time from power-up)

-

4

10

mS

Power-up time (first locked cycle after power-up)**

-

4

7

mS

Synthesis Error(Output Frequency)

-

0

-

ppm

Jitter (cycle to cycle)

-

TBD

-

pS

Period Jitter

-

TBD

-

pS

Output duty cycle

40

50

60

%

Maximum Absolute Jitter

-

TBD

-

pS