TPS77901, TPS77918, TPS77925, TPS77930

250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE

SLVS283A – MARCH 2000 – REVISED MARCH 2000

2

POST OFFICE BOX 655303

description (continued)

The device is enabled when the EN pin is connected to a high-level input voltage. This LDO family also features

a sleep mode; applying a TTL low signal to EN (enable) shuts down the regulator, reducing the quiescent current

to less than 1

The TPS779xx features an integrated power-on reset, commonly used as a supply voltage supervisor (SVS),

or reset output voltage. The RESET output of the TPS779xx initiates a reset in DSP, microcomputer or

microprocessor systems at power-up and in the event of an undervoltage condition. An internal comparator in

the TPS779xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated

output voltage. When OUT reaches 95% of its regulated voltage, RESET will go to a high-impedance state after

a 220 ms delay. RESET will go to low-impedance state when OUT is pulled below 95% (i.e. over load condition)

of its regulated voltage.

AVAILABLE OPTIONS

TJ

OUTPUT

VOLTAGE

(V)

PACKAGED DEVICES

J

TYP

MSOP

(DGK)

3.0

TPS77930DGK

2.5

TPS77925DGK

–40

°C to 125°C

1.8

TPS77918DGK

Adjustable

1.5 V to 5.5 V

TPS77901DGK

The TPS77901 is programmable using an external resistor divider (see

application information). The DGK package is available taped and

reeled. Add an R suffix to the device type (e.g., TPS77901DGKR).

OUT

SENSE

6

5

3

IN

IN

EN

GND

4

7

1

VI

0.1

µF

10

µF

+

OUT

8

VO

RESET Output

RESET

2

Figure 1. Typical Application Configuration (For Fixed Output Options)