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TRF2020PW Datasheet(PDF) 7 Page - Texas Instruments |
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TRF2020PW Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 26 page ![]() TRF2020 SYNTHESIZER FOR GLOBAL SYSTEM FOR MOBILE (GSM) CELLULAR TELEPHONES SLWS020B – FEBRUARY 1995 – REVISED JANUARY 1998 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 serial interface timing requirements with VDDA = 4.5 V, VDDP = VDD = 3.0 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CI Input capacitance 10 pF RI Input resistance 10 k Ω fclock CLOCK frequency 13 20 MHz tr, tf CLOCK input rise and fall time 8 ns tw(High) Pulse duration, CLOCK high 20 ns tw(Low) Pulse duration, CLOCK low 20 ns Data before CLOCK high 15 ns tsu Under continuous operation 15 ns tsu Strobe before CLOCK high First power on or programmed from standby mode 10 Cext_coupling 60 k Ω µs th Data after CLOCK high 15 ns th Strobe after CLOCK high 15 ns tw(pulse) Strobe pulse width 2 REF_IN s PARAMETER MEASUREMENT INFORMATION The timing relationship between the TRF2020 Data, Clock, and Strobe registers is shown in Figure 2. D0 D1 D22 D23 tsu th tw(HIGH) tw(LOW) tsu th tw(PULSE) Clock Disabled Store Data Clock Enabled Shift in Data Data Valid Data Change DATA CLOCK STROBE – VIH – VIL – VIH – VIL – VIH – VIL Figure 2. Serial Data Interface Timing |
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