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TRF2052 Datasheet(PDF) 1 Page - Texas Instruments |
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TRF2052 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 9 page ![]() TRF2052 LOW-VOLTAGE 2-GHz SYNTHESIZER SLWS066 – JULY 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 3-V Power Supply Operation D 2-GHz Operation D Normal and Speed-Up Charge Pumps D Dual PLL: One RF and One IF D Additional, Directly Accessible Power-Down Modes description The TRF2052 is a dual-channel, low-power, phase-locked loop (PLL) frequency synthesizer component designed specifically for digitally en- hanced cordless telephone (DECT) applications. The device is suitable for a variety of applications up through 2 GHz. A speed-up integral charge pump is used for fast channel switching. The simple serial interface is compatible with the extended performance mode (EPM) of other devices in Texas Instruments’ synthesizer family. Along with the external loop filters, the TRF2052 provides all functions for voltage-controlled oscillators (VCO) in a dual-PLL frequency synthesizer system. A main channel is provided for RF frequencies and an auxiliary channel for IF frequencies. The current-output charge pumps directly drive passive RC filter networks, to generate VCO control voltages. Fast main-channel frequency switching is achieved with a charge pump arrangement that increases the current drive and alters the loop-filter frequency response during a portion of the switching interval. The speed-up mode is controlled by the serial interface strobe signal, which goes high when a new frequency is loaded. At this time, the internal speed-up timer is activated and it enables the speed-up mode into the speed-up timer for the preprogrammed duration. During speed-up mode, the charge pump current to the external loop filter can be changed in two ways. First, the main charge pump current can be increased. Second, an additional integral charge pump can be separately and directly connected to the external loop-filter capacitor to further decrease the loop-filter charge and discharge times. Caution. These devices have limited built-in gate protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 CLOCK DATA STROBE VSS RFINP RFINN VCCP REFIN RA AUXIN VDD NENM LOCK NENA RN VDDA PHP PHI VSSA PHA PW PACKAGE (TOP VIEW) |
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