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LPC2921 Datasheet(PDF) 19 Page - NXP Semiconductors |
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LPC2921 Datasheet(HTML) 19 Page - NXP Semiconductors |
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19 / 83 page ![]() LPC2921_23_25_1 © NXP B.V. 2009. All rights reserved. Preliminary data sheet Rev. 01 — 15 June 2009 19 of 83 NXP Semiconductors LPC2921/2923/2925 ARM9 microcontroller with CAN, LIN, and USB The index sector is a special sector in which the JTAG access protection and sector security are located. The address space becomes visible by setting the FS_ISS bit and overlaps the regular flash sector’s address space. Note that the index sector, once programmed, cannot be erased. Any flash operation must be executed out of SRAM (internal or external). 6.8.3 Flash bridge wait-states To eliminate the delay associated with synchronizing flash-read data, a predefined number of wait-states must be programmed. These depend on flash-memory response time and system clock period. The minimum wait-states value can be calculated with the following formulas: Synchronous reading: (1) Asynchronous reading: (2) Remark: If the programmed number of wait-states is more than three, flash-data reading cannot be performed at full speed (i.e. with zero wait-states at the AHB bus) if speculative reading is active. 6.8.4 Pin description The flash memory controller has no external pins. However, the flash can be programmed via the JTAG pins, see Section 6.6.3. 6.8.5 Clock description The flash memory controller is clocked by CLK_SYS_FMC, see Section 6.7.2. 16 8 0x2000 A000 yes yes yes 17 8 0x2000 C000 yes yes yes 18 8 0x2000 E000 yes yes yes 0 64 0x2001 0000 yes yes yes 1 64 0x2002 0000 no yes yes 2 64 0x2003 0000 no yes yes 3 64 0x2004 0000 no no yes 4 64 0x2005 0000 no no yes 5 64 0x2006 0000 no no yes 6 64 0x2007 0000 no no yes Table 10. Flash sector overview …continued Flash memory sector number Sector size (kB) Flash memory address LPC2921 LPC2923 LPC2925 WST t acc clk () t t tclk sys () ------------------ > 1 – WST t acc addr () t tclk sys () ---------------------- > 1 – |
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