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January 1999 TOKO, Inc.

TK75005

THEORY OF OPERATION

The TK75005 is intended for use as a highly flexible

primary-side PWM controller. The TK75005 is much like

the TK75003 with the addition of an error amplifier, a GM

stage and an overvoltage comparator, and the deletion of

the TK75003 overcurrent frequency reduction feature.

The many features integrated into a simple 8-pin design

allow it to be easily configured for voltage-mode or current-

mode control, fixed frequency or fixed off-time operation,

off-line boot-strapping, and direct drive of a power MOSFET.

Using a control technique referenced in the “Application

Information” section, the TK75005 can be used as a highly

cost-effective controller for power factor correction.

The most noteworthy integrated feature in the TK75005 is

the way in which the feedback control pin is configured to

receive the error signal and the current signal for current-

mode control. Rather than receiving both inputs into a

comparator, a single input receives both signals summed

together and compares them against a fixed internal

reference. This yields two desirable effects: 1) a current-

limit threshold is automatically established, and 2) the

required error-signal polarity is the inverse of that of a

standard two-input current-mode control system. Generally,

the signal summation requires no additional external

components and adds the flexibility to add more control

signals if desired.

Another function is integrated into the FB pin. A current

ramp, which can be used to establish either the slope-

compensation ramp for a current-mode control design or

the voltage-comparison ramp for a voltage-mode control

design, flows out of the FB pin. By adjusting the terminating

resistance at the FB pin, the desired ramp magnitude is

established.

The switching frequency is determined by an internal

current source charging an external timing capacitor. The

timing capacitor is ramped between internally-fixed

thresholds, valley to peak, and then quickly discharged. A

fixed off-time control technique can readily be implemented

by using a small transistor to keep the timing capacitor

discharged during the on-time. When the on-pulse is

terminated, the timing capacitor ramps up to a fixed

threshold at a fixed rate to set the off-time.

The Undervoltage Lockout (UVLO) feature with hysteresis

minimizes the start-up current which allows a low-power

boot-strap technique to be used for the housekeeping

power. The duty ratio of the TK75005 is limited to

approximately 89% by the time required to discharge the

timing ramp.

UC3842 COMPARISON

Similarities to the UC3842

1) a single-ended transistor driver output with similar

drive performance

2) an inverting error amplifier referenced to 2.5 V with

similar electrical characteristics

3) a maximum threshold of ~1V on the current sense

voltage used to terminate the PWM pulse

4) an 8-pin SOP-8 or DIP-8 package

Unique features of the TK75005

1) a multi-signal summation point at the FB pin, instead

of a single function UC1842 C/S pin

2) built-in slope compensation sawtooth current coming

out of the FB pin, reduced parts

3) an overvoltage protection pin compared to 2.6 V

4) switching frequency set using a single capacitor,

reduced parts

5) different UVLO thresholds 10 V / 8 V

6) maximum duty cycle set at 89%