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ADN2872ACPZ-R7 Datasheet(PDF) 4 Page - Analog Devices

Part # ADN2872ACPZ-R7
Description  3.3 V Dual-Loop, 50 Mbps to 3.3 Gbps Laser Diode Driver
PDF  20 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADN2872ACPZ-R7 Datasheet(HTML) 4 Page - Analog Devices

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ADN2872
Rev. 0 | Page 4 of 20
Parameter
Min
Typ
Max
Unit
Conditions/Comments
SUPPLY
ICC7
30
mA
When IBIAS = IMOD = 0
VCC (with respect to GND)8
3.0
3.3
3.6
V
1 Temperature range: −40°C to +85°C.
2 Measured into a 15 Ω load (22 Ω resistor in parallel with digital scope 50 Ω input) using a 11110000 pattern at 2.5 Gbps, shown in Figure 2.
3 Guaranteed by design and characterization. Not production tested.
4 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows into the IMODP pin.
5 Guaranteed by design. Not production tested.
6 IBIAS/IBMON ratio stability is defined in SFF-8472 Revision 9 over temperature and supply variation.
7 See the Power Consumption section for ICC minimum for power calculation.
8 All VCC pins should be shorted together.
ADN2872
IMODP
BIAS TEE
80kHz
→ 27GHz
VCC
VCC
TO HIGH SPEED
DIGITAL
OSCILLOSCOPE
50
Ω INPUT
R
22
Ω
C
L
Figure 2. High Speed Electrical Test Output Circuit
SFP TIMING SPECIFICATIONS
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
Conditions/Comments
ALS Assert Time
t_off
1
5
μs
Time for the rising edge of ALS (Tx_DISABLE) to
when the bias current falls below 10% of nominal
ALS Negate Time1
t_on
0.83
0.95
ms
Time for the falling edge of ALS to when the
modulation current rises above 90% of nominal
Time to Initialize, Including Reset of FAIL1
t_init
25
275
ms
From power-on or negation of FAIL using ALS
FAIL Assert Time
t_fault
100
μs
Time to fault to FAIL on
ALS to Reset Time
t_reset
5
μs
Time Tx_DISABLE must be held high to reset Tx_FAULT
1 Guaranteed by design and characterization. Not production tested.
DATAP
DATAN
DATAP – DATAN
Vp-p, DIFF = 2 × VSE
VSE
0V
Figure 3. Signal Level Definition
0.1µF
0.1µF
10µF
1µH
3.3V
SFP HOST BOARD
SFP MODULE
VCC_Tx
Figure 4. Recommended SFP Supply



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