XRT73R12 datasheet(73/89 Pages) EXAR

73 / 89 page

XRT73R12

REV. 1.0.3

TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

TABLE 32: XRT73R12 REGISTER MAP SHOWING ALARM STATUS REGISTERS (AS_N)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Reserved

Loss of PRBS

Pattern Sync

Digital LOS

Defect

Declared

Analog LOS

Defect

Declared

Reserved

Receive LOL

Defect

Declared

Receive LOS

Defect

Declared

Transmit

DMO

Condition

R/O

TABLE 33: ALARM STATUS REGISTER - CHANNEL N ADDRESS LOCATION = 0XM3

(N = [0:11] & M= 0-5 & 8-D)

BIT NUMBER

NAME

TYPE

DESCRIPTION

Reserved

Loss of PRBS Pat-

tern Lock

R/O

Loss of PRBS Pattern Lock Indicator:

This READ-ONLY bit-field indicates whether or not the PRBS Receiver

(within the Receive Section of Channel n) is declaring PRBS Lock within the

incoming PRBS pattern.

If the PRBS Receiver detects a very large number of bit-errors within its

incoming data-stream, then it will declare the Loss of PRBS Lock Condition.

Conversely, if the PRBS Receiver were to detect its pre-determined PRBS

pattern with the incoming DS3, E3 or STS-1 data-stream, (with little or no bit

errors) then the PRBS Receiver will clear the Loss of PRBS Lock condition.

0 - Indicates that the PRBS Receiver is currently declaring the PRBS Lock

condition within the incoming DS3, E3 or STS-1 data-stream.

1 - Indicates that the PRBS Receiver is currently declaring the Loss of PRBS

Lock condition within the incoming DS3, E3 or STs-1 data-stream.

NOTE: This register bit is only valid if all of the following are true.

a. The PRBS Generator block (within the Transmit Section of the Chip is

enabled).

b. The PRBS Receiver is enabled.

c. The PRBS Pattern (that is generated by the PRBS Generator) is

somehow looped back into the Receive Path (via the Line-Side) and

in-turn routed to the receive input of the PRBS Receiver.

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