MA007AF datasheet(2/16 Pages) MEGAWIN

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MA007A Technical Summary

MEGAWIN

General Description

The

MA007

are

high-speed

Si-gate

CMOS

devices. There are three groups 8-stage serial

shift register with a storage register and 3-state

outputs in MA007. The shift register and storage

the positive-going transitions of the SCLK input.

The data in each register is transferred to the

storage register on a positive-going transition of

the PCLK input. If both clocks are connected

together, the shift register will always be one clock

pulse ahead of the storage register. The shift

standard output (DOUTx) for cascading. It is also

provided with asynchronous reset (active LOW)

for all 8 stages shift register. The storage register

has 8 parallel 3-state bus driver outputs. Data in

the storage register appears at the output

whenever the output enable input (/OE) is LOW.

Pad Description

Pad No.

Pad Name

I/O

Description

/OE

Output enable (active LOW)

PCLK

Parallel register clock input

/SCLR

Serial register reset (active LOW)

SCLK

Shift register clock input

5, 6, 7

DIN0, DIN1, DIN2

Serial data input

10, 9, 8

DOUT0, DOUT1, DOUT2

Serial data output

20 to 13

Q20 to Q27

Parallel data group 2 output

29 to 22

Q10 to Q17

Parallel data group 1 output

38 to 31

Q00 to Q07

Parallel data group 0 output

12, 30, 40

VCC

Positive supply voltage

11, 21, 39, 41

GND

Power ground (0 V)

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