P r o d u c t I n n o v a t i o n F r o m

PA12M/883

PA12MU

1

PA12M/883

SG PARAMETER

SYMBOL

TEMP. POWER

TEST CONDITIONS

MIN

MAX

UNITS

1

Quiescent current

I

Q

25°C

±40V

V

50

mA

1

Input offset voltage

V

OS

25°C

±40V

V

±6

mV

1

Input offset voltage

V

OS

25°C

±10V

V

±12

mV

1

Input offset voltage

V

OS

25°C

±45V

V

±7

mV

1

Input bias current, +IN

+I

B

25°C

±40V

V

±30

nA

1

Inout bias current,–IN

–I

B

25°C

±40V

V

±30

nA

1

Input offset current

I

OS

25°C

±40V

V

±30

nA

3

Quiescent current

I

Q

–55°C

±40V

V

100

mA

3

Input offset voltage

V

OS

–55°C

±40V

V

±11.2

mV

3

Input offset voltage

V

OS

–55°C

±10V

V

±17.2

mV

3

Input offset voltage

V

OS

–55°C

±45V

V

±12.2

mV

3

Input bias current, +IN

+I

B

–55°C

±40V

V

±115

nA

3

Input bias current,–IN

–I

B

–55°C

±40V

V

±115

nA

3

Input offset current

I

OS

–55°C

±40V

V

±115

nA

2

Quiescent current

I

Q

125°C

±40V

V

50

mA

2

Input offset voltage

V

OS

125°C

±40V

V

±12.5

mV

2

Input offset voltage

V

OS

125°C

±10V

V

±18.5

mV

2

Input offset voltage

V

OS

125°C

±45V

V

±13.5

mV

2

Input bias current, +IN

+I

B

125°C

±40V

V

±70

nA

2

Input bias current, –IN

–I

B

125°C

±40V

V

±70

nA

2

Input offset current

I

OS

125°C

±40V

V

±70

nA

4

Output voltage, I

V

O

25°C

±16V

R

10

V

4

Output voltage, I

V

O

25°C

±45V

R

40

V

4

Output voltage, I

V

O

25°C

±35V

R

30

V

4

Current limits

I

CL

25°C

±14V

R

.6

.89

A

4

Stability/noise

E

N

25°C

±40V

R

1

mV

4

Slew rate

SR

25°C

±40V

R

2.5

10

V/µs

4

Open loop gain

A

OL

25°C

±40V

R

96

dB

4

Common mode rejection

CMR

25°C

±15V

R

74

dB

6

Output voltage, I

V

O

–55°C

±14V

R

8

V

6

Output voltage, I

V

O

–55°C

±45V

R

40

V

6

Stability/noise

E

N

–55°C

±40V

R

1

mV

6

Slew rate

SR

–55°C

±40V

R

2.5

10

V/µs

6

Open loop gain

A

OL

–55°C

±40V

R

96

dB

6

Common mode rejection

CMR

–55°C

±15V

R

74

dB

5

Output voltage, I

V

O

125°C

±14V

R

8

V

5

Output voltage, I

V

O

125°C

±45V

R

40

V

5

Stability/noise

E

N

125°C

±40V

R

1

mV

5

Slew rate

SR

125°C

±40V

R

2.5

10

V/µs

5

Open loop gain

A

OL

125°C

±40V

R

96

dB

5

Common mode rejection

CMR

125°C

±15V

R

74

dB

BURN IN CIRCUIT

/ 1 Minimum gain recommendation is either G = +4 (non-

inverting) or G = –3 (inverting).

/ 2 Input signals are calculated to result in internal power

dissipation of approximately 2.1W at case temperature =

125°C.

/ 3

These components are used to stabilize device due to

poor hgh frequency characteristics of burn in board.

100KΩ

1Ω

1Ω

100KΩ

+15V

–15V

5

6

2

1

8

3

20Ω

/3

/3

/2

U.U.T

4

Table 4 Group A Inspection

PA12M/883

P r o d u c t I n n o v a t i o n F r o m

Copyright © Cirrus Logic, Inc. 2009

(All Rights Reserved)

http://www.cirrus.com

SEP 2009

APEX − PA12MUREVL