CPC1465

12

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R02

3. Manufacturing Information

3.1 Mechanical Dimensions

3.1.1 SOIC

NOTE: The CPC1465 uses a slightly different package

than the LH1465AAE. Some adjustment to the

printed-circuit-board pad layout may be needed for

existing applications.

8.890 TYP

(0.350 TYP)

0.406 TYP

(0.016 TYP)

MIN: 0.0254 (0.001)

MAX: 0.102 (0.004)

10.160±0.381

(0.400±0.015)

7.493±0.127

(0.295±0.005)

10.363±0.127

(0.408±0.005)

1.270 TYP

(0.050 TYP)

0.635 X 45°

(0.025 X 45°)

0.254 ±0.0127

(0.010±0.0005)

1.016 TYP

(0.040 TYP)

0.508±0.1016

(0.020±0.004)

PIN 1

PIN 16

2.108 MAX

(0.083 MAX)

See Note 3

Lead to Package Standoff:

inches

(mm)

DIMENSIONS

NOTES:

1. Coplanarity = 0.1016 (0.004) max.

2. Leadframe thickness does not include solder plating (1000 microinch maximum).

3. Sum of package height, standoff, and coplanarity does not exceed 2.108 (0.083).