TLE 8444SL

Block Description

Data Sheet

24

Rev. 1.1, 2009-07-07

5.5

Output Switching Capability

Dead Time to prevent Cross Currents

In bridge configurations the high-side and low-side power transistors are ensured never to be simultaneously “ON”

to avoid cross currents. This is usually assured by the integration of delays in the driver stage for the power

outputs, generating a so-called dead-time between switching off one Power Transistors while switching on the

other Power Transistor of the same half-bridge.

specified. Refer to Figure 16 and the test circuit in Figure 17.

Figure 16

Switching Time Definitions

V

INx

t

H

L

IOUT

x

50%

90%

10%

90%

10%

50%

no current

90%

10%

10%

90%

t

Vs

100

Ω

+

Vs

100

Ω

-