General Features

– 132 Powerful Instructions - Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Up to 16MIPS Throughput at 16Mhz

– On-chip 2-cycle Multiplier

– 16K Bytes of ROM Program Memory

– 768 Bytes Internal SRAM

– Programmable ISO clock from 1 Mhz to 12 Mhz

– Card insertion/removal detection with automatic deactivation sequence

– Programmable Baud Rate Generator from 372 to 3 clock cycles

– Synchronous/Asynchronous Protocols T=0 and T=1 with Direct or Inverse

Convention

– Automatic character repetition on parity errors

– 32 Bit Waiting Time Counter

– 16 Bit Guard Time Counter/Block Guard Time Counter

– Internal Step Up/Down Converter with Programmable Voltage Output if DC/DC

embedded:

• Class A: 5V +/-8% at 60mA, Vcc>2.85 (50mA if Vcc >2.7)

• Class B: 3V +/-8% at 60mA, Vcc>2.85 (50mA if Vcc >2.7)

• Class C: 1.8V +/-8% at 35mA

– 4 kV ESD (MIL/STD 833 Class 3) protection on whole Smart Card Interface

– Complies fully with:

• Universal Serial Bus Specification Rev 2.0

– Supports data transfer rates up to 12 Mbit/s

– Endpoint 0 for Control Transfers : up to 64-bytes

– 4 Programmable Endpoints with IN or OUT Directions and with Bulk, Interrupt or

Isochronous Transfers

– Suspend/Resume Interrupts, and Remote Wake-up Support

– Power-on Reset and USB Bus Reset

– 48 Mhz clock for Full-speed Bus Operation

– USB Bus Disconnection on Microcontroller Request

– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Compare Mode

– Hardware Watchdog

– USART interface (up to 2Mbps)

– USART in SPI mode

– Power-on Reset and Brown-out Detection

– External and Internal Interrupt Sources

– Three Sleep Modes: Idle, Power-down and Standby

8-bit

Microcontroller

for Smart Card

Readers

AT90SCR050

Datasheet

Summary

TPG0450X–SMS–09Nov09