ATmega128 datasheet(278/386 Pages) ATMEL

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278

2467S–AVR–07/09

ATmega128

or if no SPM instruction is executed within four clock cycles. The CPU is halted during the entire

page write operation if the NRWW section is addressed.

• Bit 0 – SPMEN: Store Program Memory Enable

This bit enables the SPM instruction for the next four clock cycles. If written to one together with

either RWWSRE, BLBSET, PGWRT’ or PGERS, the following SPM instruction will have a spe-

cial meaning, see description above. If only SPMEN is written, the following SPM instruction will

store the value in R1:R0 in the temporary page buffer addressed by the Z-pointer. The LSB of

the Z-pointer is ignored. The SPMEN bit will auto-clear upon completion of an SPM instruction,

or if no SPM instruction is executed within four clock cycles. During page erase and page write,

the SPMEN bit remains high until the operation is completed.

Writing any other combination than “10001”, “01001”, “00101”, “00011” or “00001” in the lower

five bits will have no effect.

Addressing the

Flash During Self-

Programming

The Z-pointer together with RAMPZ are used to address the SPM commands. For details on

how to use the RAMPZ, see “RAM Page Z Select Register – RAMPZ” on page 14.

Since the Flash is organized in pages (see Table 123 on page 291), the program counter can be

treated as having two different sections. One section, consisting of the least significant bits, is

addressing the words within a page, while the most significant bits are addressing the pages.

This is shown in Figure 134. Note that the page erase and page write operations are addressed

independently. Therefore it is of major importance that the Boot Loader software addresses the

same page in both the page erase and page write operation. Once a programming operation is

initiated, the address is latched and the Z-pointer/RAMPZ can be used for other operations.

The only SPM operation that does not use the Z-pointer/RAMPZ is setting the Boot Loader Lock

bits. The content of the Z-pointer/RAMPZ is ignored and will have no effect on the operation.

The (E)LPM instruction does also use the Z-pointer/RAMPZ to store the address. Since this

instruction addresses the Flash byte by byte, also the LSB (bit Z0) of the Z-pointer is used.

Bit

151413

1211

ZH (R31)

Z15

Z14

Z13

Z12

Z11

Z10

ZL (R30)

765

432

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