ATmega165V-8AI datasheet(78/336 Pages) ATMEL

78 / 336 page

ATmega165/V

2573G–AVR–07/09

The OCR0A Register is double buffered when using any of the Pulse Width Modulation

(PWM) modes. For the normal and Clear Timer on Compare (CTC) modes of operation,

the double buffering is disabled. The double buffering synchronizes the update of the

OCR0 Compare Register to either top or bottom of the counting sequence. The synchro-

nization prevents the occurrence of odd-length, non-symmetrical PWM pulses, thereby

making the output glitch-free.

The OCR0A Register access may seem complex, but this is not case. When the double

buffering is enabled, the CPU has access to the OCR0A Buffer Register, and if double

buffering is disabled the CPU will access the OCR0A directly.

Force Output Compare

In non-PWM waveform generation modes, the match output of the comparator can be

forced by writing a one to the Force Output Compare (FOC0A) bit. Forcing compare

match will not set the OCF0A Flag or reload/clear the timer, but the OC0A pin will be

updated as if a real compare match had occurred (the COM0A1:0 bits settings define

whether the OC0A pin is set, cleared or toggled).

Compare Match Blocking by

TCNT0 Write

All CPU write operations to the TCNT0 Register will block any compare match that

occur in the next timer clock cycle, even when the timer is stopped. This feature allows

OCR0A to be initialized to the same value as TCNT0 without triggering an interrupt

when the Timer/Counter clock is enabled.

Using the Output Compare

Unit

Since writing TCNT0 in any mode of operation will block all compare matches for one

timer clock cycle, there are risks involved when changing TCNT0 when using the Output

Compare unit, independently of whether the Timer/Counter is running or not. If the value

written to TCNT0 equals the OCR0A value, the compare match will be missed, resulting

in incorrect waveform generation. Similarly, do not write the TCNT0 value equal to BOT-

TOM when the counter is downcounting.

The setup of the OC0A should be performed before setting the Data Direction Register

for the port pin to output. The easiest way of setting the OC0A value is to use the Force

Output Compare (FOC0A) strobe bits in Normal mode. The OC0A Register keeps its

value even when changing between Waveform Generation modes.

Be aware that the COM0A1:0 bits are not double buffered together with the compare

value. Changing the COM0A1:0 bits will take effect immediately.

ATmega165V-8AI Datasheet(PDF) 78 Page - ATMEL Corporation