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AT89LP6440 Datasheet(PDF) 120 Page - ATMEL Corporation

Part # AT89LP6440
Description  8-bit Microcontroller with 64K Bytes In-System Programmable Flash
PDF  194 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89LP6440 Datasheet(HTML) 120 Page - ATMEL Corporation

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3706A–MICRO–9/09
AT89LP6440 - Preliminary
TWEN must be written to one to enable the TWI. The AA bit must be written to one to enable the
acknowledgment of the device’s own slave address or the general call address. STA and STO
must be written to zero.
When TWAR and TWCR have been initialized, the TWI waits until it is addressed by its own
slave address (or the general call address if enabled) followed by the data direction bit. If the
direction bit is “0” (write), the TWI will operate in SR mode, otherwise ST mode is entered. After
its own slave address and the write bit have been received, the TWIF flag is set and a valid sta-
tus code can be read from TWSR. The status code is used to determine the appropriate
software action. The appropriate action to be taken for each status code is detailed in Table 18-
8. The Slave Receiver mode may also be entered if arbitration is lost while the TWI is in the Mas-
ter mode (see states 68h and 78h).
If the AA bit is reset during a transfer, the TWI will return a “Not Acknowledge” (“1”) to SDA after
the next received data byte. This can be used to indicate that the slave is not able to receive any
more bytes. While AA is zero, the TWI does not acknowledge its own slave address. However,
the Two-wire Serial Bus is still monitored and address recognition may resume at any time by
setting AA. This implies that the AA bit may be used to temporarily isolate the TWI from the Two-
wire Serial Bus.
.
Table 18-8.
Status Codes for Slave Receiver Mode
Status
Code
(TWSR)
Status of the Two-wire
Serial Bus and Two-wire
Serial Interface Hardware
Application Software Response
Next Action Taken by TWI Hardware
To/from TWDR
To TWCR
STA
STO
TWIF
AA
60h
Own SLA+W has been
received; ACK has been
returned
No action
X
0
1
0
Data byte will be received and NOT ACK will be
returned
No action
X
0
1
1
Data byte will be received and ACK will be
returned
68h
Arbitration lost in SLA+R/W
as master; own SLA+W has
been received; ACK has
been returned
No action
X
0
1
0
Data byte will be received and NOT ACK will be
returned
No action
X
0
1
1
Data byte will be received and ACK will be
returned
70h
General call address has
been received; ACK has
been returned
No action
X
0
1
0
Data byte will be received and NOT ACK will be
returned
No action
X
0
1
1
Data byte will be received and ACK will be
returned
78h
Arbitration lost in SLA+R/W
as master; General call
address has been received;
ACK has been returned
No action
X
0
1
0
Data byte will be received and NOT ACK will be
returned
No action
X
0
1
1
Data byte will be received and ACK will be
returned
80h
Previously addressed with
own SLA+W; data has been
received; ACK has been
returned
Read data byte
X
0
1
0
Data byte will be received and NOT ACK will be
returned
Read data byte
X
0
1
1
Data byte will be received and ACK will be
returned



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