AT89LP6440 datasheet(125/194 Pages) ATMEL

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3706A–MICRO–9/09

AT89LP6440 - Preliminary

18.6.5

Miscellaneous States

There are two status codes that do not correspond to a defined TWI state, see Table 18-10.

Status F8h indicates that no relevant information is available because the TWIF flag is not set.

This occurs between other states, and when the TWI is not involved in a serial transfer.

Status 00h indicates that a bus error has occurred during a Two-wire Serial Bus transfer. A bus

error occurs when a START or STOP condition occurs at an illegal position in the format frame.

Examples of such illegal positions are during the serial transfer of an address byte, a data byte,

or an acknowledge bit. When a bus error occurs, TWIF is set. To recover from a bus error, the

STO flag must set and TWIF must be cleared. This causes the TWI to enter the not addressed

Slave mode and to clear the STO flag (no other bits in TWCR are affected). The SDA and SCL

lines are released, and no STOP condition is transmitted.

18.6.6

Combining Several TWI Modes

In some cases, several TWI modes must be combined in order to complete the desired action.

Consider for example reading data from a serial EEPROM. Typically, such a transfer involves

the following steps:

The transfer must be initiated.

The EEPROM must be instructed what location should be read.

The reading must be performed.

The transfer must be finished.

Note that data is transmitted both from Master to Slave and vice versa. The Master must instruct

the Slave what location it wants to read, requiring the use of the MT mode. Subsequently, data

must be read from the Slave, implying the use of the MR mode. Thus, the transfer direction must

be changed. The Master must keep control of the bus during all these steps, and the steps

should be carried out as an atomic operation. If this principle is violated in a multi-master sys-

tem, another Master can alter the data pointer in the EEPROM between steps 2 and 3, and the

Master will read the wrong data location. Such a change in transfer direction is accomplished by

transmitting a REPEATED START between the transmission of the address byte and reception

of the data. After a REPEATED START, the Master keeps ownership of the bus. The following

figure shows the flow in this transfer.

Table 18-10. Miscellaneous States

Status

Code

(TWSR)

Status of the Two-wire

Serial Bus and Two-wire

Serial Interface hardware

Application Software Response

Next Action Taken by TWI Hardware

To/from TWDR

To TWCR

STA

STO

TWIF

F8h

No relevant state

information available;

TWIF = “0”

No action

Wait or proceed current transfer

00h

Bus error due to an illegal

START or STOP condition

No action

Only the internal hardware is affected, no STOP

condition is sent on the bus. In all cases, the

bus is released and STO is cleared.

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