R5F64185DFD datasheet(85/124 Pages) RENESAS

85 / 124 page

REJ03B0255-0100 Rev.1.00 Nov 19, 2009

Page 85 of 122

R32C/118 Group

5. Electrical Characteristics

Note:

The device is operationally guaranteed under these operating conditions.

Figure 5.1

Clock Cycle Time

Table 5.5

Operating Conditions (4/5)

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted) (1)

Symbol

Characteristic

Value

Unit

Min.

Typ.

Max.

f(XIN)

Main clock oscillator frequency

416

MHz

f(XRef)

Reference clock frequency

MHz

f(PLL)

PLL clock oscillator frequency

128

MHz

f(Base)

Base clock frequency

MHz

tc(Base)

Base clock cycle time

f(CPU)

CPU operating frequency

MHz

tc(CPU)

CPU clock cycle time

f(BCLK)

Peripheral bus clock operating frequency

MHz

tc(BCLK)

Peripheral bus clock cycle time

f(PER)

Peripheral clock source frequency

MHz

f(XCIN)

Sub clock oscillator frequency

32.768

62.5

kHz

Base clock

(Internal signal)

t c(Base)

Peripheral bus clock

(Internal signal)

t c(BCLK)

CPU clock

(Internal signal)

t c(CPU)

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