ATmega328P datasheet(260/345 Pages) ATMEL

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7810A–AVR–11/09

ATmega328P [Preliminary]

• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger

an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion

will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-

ger source that is cleared to a trigger source that is set, will generate a positive edge on the

trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running

mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set

23.9.5

DIDR0 – Digital Input Disable Register 0

• Bits 7:6 – Res: Reserved Bits

These bits are reserved for future use. To ensure compatibility with future devices, these bits

must be written to zero when DIDR0 is written.

• Bit 5:0 – ADC5D..ADC0D: ADC5..0 Digital Input Disable

When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-

abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an

analog signal is applied to the ADC5..0 pin and the digital input from this pin is not needed, this

bit should be written logic one to reduce power consumption in the digital input buffer.

Note that ADC pins ADC7 and ADC6 do not have digital input buffers, and therefore do not

require Digital Input Disable bits.

Table 23-6.

ADC Auto Trigger Source Selections

ADTS2

ADTS1

ADTS0

Trigger Source

Free Running mode

Analog Comparator

External Interrupt Request 0

Timer/Counter0 Compare Match A

Timer/Counter0 Overflow

Timer/Counter1 Compare Match B

Timer/Counter1 Overflow

Timer/Counter1 Capture Event

Bit

(0x7E)

–

ADC5D

ADC4D

ADC3D

ADC2D

ADC1D

ADC0D

DIDR0

Read/Write

R/W

Initial Value

ATmega328P Datasheet(PDF) 260 Page - ATMEL Corporation

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