ATtiny13A datasheet(166/174 Pages) ATMEL

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166

8126D–AVR–11/09

ATtiny13A

25. Datasheet Revision History

Please note that page numbers in this section refer to the current version of this document and

may not apply to previous versions.

25.1 Rev. 8126D – 11/09

1. Added note “If the RSTDISPL fuse is programmed..” in Startup-up Times Table 6-5 and

Table 6-6 on page 26.

2. Added addresses in all Register Description tables and cross-references to Register

Summary.

3. Updated naming convention for -COM bits in tables from Table 11-2 on page 70 to

Table 11-7 on page 72.

4. Updated value for tWD_ERASE in Table 17-8, “Minimum Wait Delay Before Writing the Next

Flash or EEPROM Location,” on page 108.

5. Added NiPdAU note for -SH and -SSH in Section 22. “Ordering Information” on page

159.

25.2 Rev. 8126C – 09/09

1. Added EEPROM errata for rev. G - H on page 165.

2. Added a note about topside marking in Section 22. “Ordering Information” on page 159.

25.3 Rev. 8126B – 11/08

1. Updated order codes on page 159 to reflect changes in material composition.

2. Updated sections:

– “DIDR0 – Digital Input Disable Register 0” on page 81

– “DIDR0 – Digital Input Disable Register 0” on page 95

3. Updated “Register Summary” on page 155.

25.4 Rev. 8126A – 05/08

1. Initial revision, created from document 2535I – 04/08.

2. Updated characteristic plots of section “Typical Characteristics” , starting on page 124.

3. Updated “Ordering Information” on page 159.

4. Updated section:

– “Speed Grades” on page 118

5. Update tables:

– “DC Characteristics, TA = -40×C to 85×C” on page 117

– “Calibration Accuracy of Internal RC Oscillator” on page 119

– “Reset, Brown-out, and Internal Voltage Characteristics” on page 120

– “ADC Characteristics, Single Ended Channels. TA = -40×C - 85×C” on page 121

– “Serial Programming Characteristics, TA = -40×C to 85×C” on page 122

6. Added description of new function, “Power Reduction Register”:

– Added functional description on page 31

– Added bit description on page 34

– Added section “Supply Current of I/O Modules” on page 124

– Updated Register Summary on page 155

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