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ATmega32A Datasheet(PDF) 222 Page - ATMEL Corporation |
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ATmega32A Datasheet(HTML) 222 Page - ATMEL Corporation |
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222 / 352 page  222 8155B–AVR–07/09 ATmega32A Example: ADMUX = 0xED (ADC3 - ADC2, 10x gain, 2.56V reference, left adjusted result) Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV. ADCR = 512 * 10 * (300 - 500) / 2560 = -400 = 0x270 ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts the result: ADCL = 0x70, ADCH = 0x02. 22.9 Register Description 22.9.1 ADMUX – ADC Multiplexer Selection Register • Bit 7:6 – REFS1:0: Reference Selection Bits These bits select the voltage reference for the ADC, as shown in Table 22-3. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external reference voltage is being applied to the AREF pin. • Bit 5 – ADLAR: ADC Left Adjust Result The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver- sions. For a complete description of this bit, see “ADCL and ADCH – The ADC Data Register” on page 225. :. :. :. V ADCm + 1/512 VREF/GAIN 0x001 1 VADCm 0x000 0 V ADCm - 1/512 VREF/GAIN 0x3FF -1 :. :. :. VADCm - 511/512 VREF/GAIN 0x201 -511 V ADCm - VREF/GAIN 0x200 -512 Table 22-2. Correlation between Input Voltage and Output Codes (Continued) VADCn Read code Corresponding Decimal Value Bit 765 432 10 REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 ADMUX Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Table 22-3. Voltage Reference Selections for ADC REFS1 REFS0 Voltage Reference Selection 0 0 AREF, Internal Vref turned off 0 1 AVCC with external capacitor at AREF pin 10 Reserved 1 1 Internal 2.56V Voltage Reference with external capacitor at AREF pin |
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