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ATmega32A Datasheet(PDF) 235 Page - ATMEL Corporation

Part # ATmega32A
Description  8-bit Microcontroller with 32K Bytes In-System Programmable Flash
PDF  352 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega32A Datasheet(HTML) 235 Page - ATMEL Corporation

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235
8155B–AVR–07/09
ATmega32A
Figure 24-2. Reset Register
24.3.4
Boundary-scan Chain
The Boundary-scan Chain has the capability of driving and observing the logic levels on the dig-
ital I/O pins, as well as the boundary between digital and analog logic for analog circuitry having
Off-chip connections.
See “Boundary-scan Chain” on page 236 for a complete description.
24.4
Boundary-scan Specific JTAG Instructions
The instruction register is 4-bit wide, supporting up to 16 instructions. Listed below are the JTAG
instructions useful for Boundary-scan operation. Note that the optional HIGHZ instruction is not
implemented, but all outputs with tri-state capability can be set in high-impedant state by using
the AVR_RESET instruction, since the initial state for all port pins is tri-state.
As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.
The OPCODE for each instruction is shown behind the instruction name in hex format. The text
describes which Data Register is selected as path between TDI and TDO for each instruction.
24.4.1
EXTEST; $0
Mandatory JTAG instruction for selecting the Boundary-scan Chain as Data Register for testing
circuitry external to the AVR package. For port-pins, Pull-up Disable, Output Control, Output
Data, and Input Data are all accessible in the scan chain. For Analog circuits having Off-chip
connections, the interface between the analog and the digital logic is in the scan chain. The con-
tents of the latched outputs of the Boundary-scan chain is driven out as soon as the JTAG IR-
register is loaded with the EXTEST instruction.
The active states are:
• Capture-DR: Data on the external pins are sampled into the Boundary-scan Chain.
• Shift-DR: The Internal Scan Chain is shifted by the TCK input.
• Update-DR: Data from the scan chain is applied to output pins.
24.4.2
IDCODE; $1
Optional JTAG instruction selecting the 32-bit ID-register as Data Register. The ID-register con-
sists of a version number, a device number and the manufacturer code chosen by JEDEC. This
is the default instruction after power-up.
DQ
From
TDI
ClockDR · AVR_RESET
To
TDO
From other Internal and
External Reset Sources
Internal Reset



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