ATmega32A datasheet(239/352 Pages) ATMEL

239 / 352 page

239

8155B–AVR–07/09

ATmega32A

Figure 24-5. Additional Scan Signal for the Two-wire Interface

24.5.3

Scanning the RESET Pin

The RESET pin accepts 5V active low logic for standard reset operation, and 12V active high

logic for High Voltage Parallel Programming. An observe-only cell as shown in Figure 24-6 is

inserted both for the 5V reset signal; RSTT, and the 12V reset signal; RSTHV.

Figure 24-6. Observe-only Cell

24.5.4

Scanning the Clock Pins

The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-

tor, External RC, External Clock, (High Frequency) Crystal Oscillator, Low Frequency Crystal

Oscillator, and Ceramic Resonator.

Figure 24-7 shows how each Oscillator with external connection is supported in the scan chain.

The Enable signal is supported with a general boundary-scan cell, while the Oscillator/Clock out-

put is attached to an observe-only cell. In addition to the main clock, the Timer Oscillator is

scanned in the same way. The output from the internal RC Oscillator is not scanned, as this

Oscillator does not have external connections.

Pxn

PUExn

ODxn

IDxn

TWIEN

OCxn

Slew-rate Limited

SRC

From

Cell

ClockDR

ShiftDR

Cell

From System Pin

To System Logic

FF1

ATmega32A Datasheet(PDF) 239 Page - ATMEL Corporation