ATmega32A datasheet(240/352 Pages) ATMEL

240 / 352 page

240

8155B–AVR–07/09

ATmega32A

Figure 24-7. Boundary-scan Cells for Oscillators and Clock Options

Table 24-3 summaries the scan registers for the external clock pin XTAL1, Oscillators with

XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.

Notes:

1. Do not enable more than one clock source as main clock at a time.

2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between

the Internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is

preferred.

3. The clock configuration is programmed by fuses. As a fuse is not changed run-time, the clock

configuration is considered fixed for a given application. The user is advised to scan the same

clock option as to be used in the final system. The enable signals are supported in the scan

chain because the system logic can disable clock options in sleep modes, thereby disconnect-

ing the Oscillator pins from the scan path if not provided. The INTCAP fuses are not supported

in the scan-chain, so the boundary scan chain can not make a XTAL Oscillator requiring inter-

nal capacitors to run unless the fuse is correctly programmed.

24.5.5

Scanning the Analog Comparator

The relevant Comparator signals regarding Boundary-scan are shown in Figure 24-8. The

Boundary-scan cell from Figure 24-9 is attached to each of these signals. The signals are

described in Table 24-4.

Table 24-3.

Scan Signals for the Oscillators

(1)(2)(3)

Enable Signal

Scanned Clock Line

Clock Option

Scanned Clock Line

when not Used

EXTCLKEN

EXTCLK (XTAL1)

External Clock

OSCON

OSCCK

External Crystal

External Ceramic

Resonator

RCOSCEN

RCCK

External RC

OSC32EN

OSC32CK

Low Freq. External Crystal

TOSKON

TOSCK

32 kHz Timer Oscillator

From

Cell

ClockDR

ShiftDR

Cell

FF1

From

Cell

ClockDR

UpdateDR

ShiftDR

Cell

EXTEST

XTAL1/TOSC1

XTAL2/TOSC2

Oscillator

ENABLE

OUTPUT

ATmega32A Datasheet(PDF) 240 Page - ATMEL Corporation

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