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ATmega644PA Datasheet(PDF) 163 Page - ATMEL Corporation |
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ATmega644PA Datasheet(HTML) 163 Page - ATMEL Corporation |
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163 / 468 page ![]() 163 8152G–AVR–11/09 ATmega164PA/324PA/644PA/1284P 17. SPI – Serial Peripheral Interface 17.1 Features • Full-duplex, Three-wire Synchronous Data Transfer • Master or Slave Operation • LSB First or MSB First Data Transfer • Seven Programmable Bit Rates • End of Transmission Interrupt Flag • Write Collision Flag Protection • Wake-up from Idle Mode • Double Speed (CK/2) Master SPI Mode 17.2 Overview The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the ATmega164PA/324PA/644PA/1284P and peripheral devices or between several AVR devices. USART can also be used in Master SPI mode, see ”USART in SPI Mode” on page 200. The Power Reduction SPI bit, PRSPI, in ”PRR – Power Reduction Register” on page 49 on page 50 must be written to zero to enable SPI module. Figure 17-1. SPI Block Diagram(1) Note: 1. Refer to Figure 1-1 on page 2, and Table 13-6 on page 84 for SPI pin placement. DIVIDER /2/4/8/16/32/64/128 |
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