ATmega644PA datasheet(318/468 Pages) ATMEL

318 / 468 page

318

8152G–AVR–11/09

ATmega164PA/324PA/644PA/1284P

26.10.8

Reset Register

The Reset Register is a Test Data Register used to reset the part during programming. It is

required to reset the part before entering Programming mode.

A high value in the Reset Register corresponds to pulling the external reset low. The part is reset

as long as there is a high value present in the Reset Register. Depending on the Fuse settings

for the clock options, the part will remain reset for a Reset Time-out period (refer to ”Clock

Sources” on page 31) after releasing the Reset Register. The output from this Data Register is

not latched, so the reset will take place immediately, as shown in Figure 24-2 on page 270.

26.10.9

Programming Enable Register

The Programming Enable Register is a 16-bit register. The contents of this register is compared

to the programming enable signature, binary code 0b1010_0011_0111_0000. When the con-

tents of the register is equal to the programming enable signature, programming via the JTAG

port is enabled. The register is reset to 0 on Power-on Reset, and should always be reset when

leaving Programming mode.

Figure 26-14. Programming Enable Register

26.10.10 Programming Command Register

The Programming Command Register is a 15-bit register. This register is used to serially shift in

programming commands, and to serially shift out the result of the previous command, if any. The

JTAG Programming Instruction Set is shown in Table 26-18 on page 320. The state sequence

when shifting in the programming commands is illustrated in Figure 26-16 on page 323.

TDI

TDO

ClockDR & PROG_ENABLE

Programming Enable

0xA370

ATmega644PA Datasheet(PDF) 318 Page - ATMEL Corporation