6

9136C–INDCO–10/09

ATA8404/ATA8405 [Preliminary]

4.1

Transmission with ENABLE = open

4.1.1

ASK Mode

The ATA8404/ATA8405 is activated by ENABLE = open, FSK = High, ASK = Low. The micro-

controller is then switched to external clocking. After typically 0.6 ms, the CLK driver is

activated automatically (i.e., the microcontroller waits until the XTO and CLK are ready). After

another time period of

then be modulated by means of pin ASK. After transmission, ASK is switched to Low and the

microcontroller returns back to internal clocking. Then, the ATA8404/ATA8405 is switched to

power-down mode with FSK = Low.

Figure 4-1.

Timing ASK Mode with ENABLE not Connected to the Microcontroller

4.1.2

FSK Mode

The ATA8404/ATA8405 is activated by FSK = High, ASK = Low. The microcontroller is then

switched to external clocking. After typically 0.6 ms, the CLK driver is activated automatically

(i.e., the microcontroller waits until the XTO and CLK are ready. After another time period of

ASK = H. The ATA8404/ATA8405 is then ready for FSK modulation. The microcontroller starts

to switch on and off the capacitor between the crystal load capacitor and GND by means of pin

FSK, thus, changing the reference frequency of the PLL. IF FSK = L the output frequency is

lower; if FSK = H the output frequency is higher. After transmission, FSK stays High and ASK

is switched to Low and the microcontroller returns back to internal clocking. Then, the

ATA8404/ATA8405 is switched to power-down mode with FSK = Low.

Figure 4-2.

Timing FSK Mode with ENABLE not Connected to the Microcontroller

FSK

CLK

Power-up,

PA off

ASK

ΔT

XTO

Power-down

Power-up,

PA on

(High)

> 250 µs

Power-down

Power-up,

PA off

(Low)

FSK

CLK

Power-up,

PA off

ASK

ΔT

XTO

Power-down

Power-up,

PA on

(f

> 250 µs

Power-down

Power-up,

PA off

(f