HT68F20 datasheet(161/210 Pages) HOLTEK

161 / 210 page

HT68F20/HT68F30/HT68F40/HT68F50/HT68F60

Rev. 1.00

161

November 3, 2009

Serial Interface Module Interrupt

The Serial Interface Module Interrupt, also known as the

SIM interrupt, is contained within the Multi-function In-

terrupt. A SIM Interrupt request will take place when the

SIM Interrupt request flag, SIMF, is set, which occurs

when a byte of data has been received or transmitted by

the SIM interface. To allow the program to branch to its

respective interrupt vector address, the global interrupt

enable bit, EMI, and the Serial Interface Interrupt enable

bit, SIME, and Muti-function interrupt enable bits, must

first be set. When the interrupt is enabled, the stack is

not full and a byte of data has been transmitted or re-

ceived by the SIM interface, a subroutine call to the re-

spective Multi-function Interrupt vector, will take place.

When the Serial Interface Interrupt is serviced, the EMI

bit will be automatically cleared to disable other inter-

rupts, however only the Multi-function interrupt request

flag will be also automatically cleared. As the SIMF flag

will not be automatically cleared, it has to be cleared by

the application program.

External Peripheral Interrupt

The External Peripheral Interrupt operates in a similar

way to the external interrupt and is contained within the

Multi-function Interrupt. A Peripheral Interrupt request

will take place when the External Peripheral Interrupt re-

quest flag, XPF, is set, which occurs when a negative

edge transition appears on the PINT pin. To allow the

program to branch to its respective interrupt vector ad-

dress, the global interrupt enable bit, EMI, external pe-

ripheral interrupt enable bit, XPE, and associated

Multi-function interrupt enable bit, must first be set.

When the interrupt is enabled, the stack is not full and a

negative transition appears on the External Peripheral

Interrupt pin, a subroutine call to the respective

Multi-function Interrupt, will take place. When the Exter-

nal Peripheral Interrupt is serviced, the EMI bit will be

automatically cleared to disable other interrupts, how-

ever only the Multi-function interrupt request flag will be

also automatically cleared.

As the XPF flag will not be automatically cleared, it has

to be cleared by the application program. The external

peripheral interrupt pin is pin-shared with several other

pins with different functions. It must therefore be prop-

erly configured to enable it to operate as an External Pe-

ripheral Interrupt pin.

EEPROM Interrupt

The EEPROM Interrupt, is contained within the

Multi-function Interrupt. An EEPROM Interrupt request

will take place when the EEPROM Interrupt request

flag, DEF, is set, which occurs when an EEPROM Write

or Read cycle ends. To allow the program to branch to

its respective interrupt vector address, the global inter-

rupt enable bit, EMI, EEPROM Interrupt enable bit,

DEE, and associated Multi-function interrupt enable bit,

must first be set. When the interrupt is enabled, the

stack is not full and an EEPROM Write or Read cycle

ends, a subroutine call to the respective Multi-function

Interrupt vector, will take place. When the EEPROM In-

terrupt is serviced, the EMI bit will be automatically

cleared to disable other interrupts, however only the

Multi-function interrupt request flag will be also automat-

ically cleared. As the DEF flag will not be automatically

cleared, it has to be cleared by the application program.

LVD Interrupt

The Low Voltage Detector Interrupt is contained within

the Multi-function Interrupt. An LVD Interrupt request will

take place when the LVD Interrupt request flag, LVF, is

set, which occurs when the Low Voltage Detector func-

tion detects a low power supply voltage. To allow the

program to branch to its respective interrupt vector ad-

dress, the global interrupt enable bit, EMI, Low Voltage

Interrupt enable bit, LVE, and associated Multi-function

interrupt enable bit, must first be set. When the interrupt

is enabled, the stack is not full and a low voltage condi-

tion occurs, a subroutine call to the Multi-function Inter-

rupt vector, will take place. When the Low Voltage

Interrupt is serviced, the EMI bit will be automatically

cleared to disable other interrupts, however only the

Multi-function interrupt request flag will be also automat-

ically cleared. As the LVF flag will not be automatically

cleared, it has to be cleared by the application program.

TM Interrupts

The Compact and Standard Type TMs have two inter-

rupts each, while the Enhanced Type TM has three in-

terrupts. All of the TM interrupts are contained within the

Multi-function Interrupts. For each of the Compact and

Standard Type TMs there are two interrupt request flags

TnPF and TnAF and two enable bits TnPE and TnAE.

For the Enhanced Type TM there are three interrupt re-

quest flags TnPF, TnAF and TnBF and three enable bits

TnPE, TnAE and TnBE. A TM interrupt request will take

place when any of the TM request flags are set, a situa-

tion which occurs when a TM comparator P, A or B

match situation happens.

To allow the program to branch to its respective interrupt

vector address, the global interrupt enable bit, EMI, re-

spective TM Interrupt enable bit, and relevant

Multi-function Interrupt enable bit, MFnE, must first be

set. When the interrupt is enabled, the stack is not full

and a TM comparator match situation occurs, a subrou-

tine call to the relevant Multi-function Interrupt vector lo-

cations, will take place. When the TM interrupt is

serviced, the EMI bit will be automatically cleared to dis-

able other interrupts, however only the related MFnF

flag will be automatically cleared. As the TM interrupt re-

quest flags will not be automatically cleared, they have

to be cleared by the application program.

HT68F20 Datasheet(PDF) 161 Page - Holtek Semiconductor Inc

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