HT68F20 datasheet(165/210 Pages) HOLTEK

165 / 210 page

HT68F20/HT68F30/HT68F40/HT68F50/HT68F60

Rev. 1.00

165

November 3, 2009

LVD Operation

The Low Voltage Detector function operates by compar-

ing the power supply voltage, VDD, with a pre-specified

voltage level stored in the LVDC register. This has a

range of between 2.0V and 4.4V. When the power sup-

ply voltage, VDD, falls below this pre-determined value,

the LVDO bit will be set high indicating a low power sup-

ply voltage condition. The Low Voltage Detector func-

tion is supplied by a reference voltage which will be

automatically enabled. When the device is powered

down the low voltage detector will remain active if the

LVDEN bit is high. After enabling the Low Voltage De-

tector, a time delay tLVDS should be allowed for the cir-

cuitry to stabilise before reading the LVDO bit. Note also

that as the VDD voltage may rise and fall rather slowly, at

the voltage nears that of VLVD, there may be multiple bit

LVDO transitions.

The Low Voltage Detector also has its own interrupt

which is contained within one of the Multi-function inter-

rupts, providing an alternative means of low voltage de-

tection, in addition to polling the LVDO bit. The interrupt

will only be generated after a delay of tLVD after the LVDO

bit has been set high by a low voltage condition. When

the device is powered down the Low Voltage Detector

will remain active if the LVDEN bit is high. In this case,

the LVF interrupt request flag will be set, causing an in-

terrupt to be generated if VDD falls below the preset LVD

voltage. This will cause the device to wake-up from the

SLEEP or IDLE Mode, however if the Low Voltage De-

tector wake up function is not required then the LVF flag

should be first set high before the device enters the

SLEEP or IDLE Mode.

SCOM Function for LCD

The devices have the capability of driving external LCD

panels. The common pins for LCD driving, SCOM0~

SCOM3, are pin shared with certain pin on the PC0~

PC3 or PC0 ~ PC1, PC6 ~ PC7 port. The LCD signals

(COM and SEG) are generated using the application

program.

LCD Operation

An external LCD panel can be driven using this device

by configuring the PC0~PC3 or PC0 ~ PC1, PC6 ~ PC7

pins as common pins and using other output ports lines

as segment pins. The LCD driver function is controlled

using the SCOMC register which in addition to control-

ling the overall on/off function also controls the bias volt-

age setup function. This enables the LCD COM driver to

generate the necessary VDD/2 voltage levels for LCD 1/2

bias operation.

The SCOMEN bit in the SCOMC register is the overall

master control for the LCD driver, however this bit is

used in conjunction with the COMnEN bits to select

which Port C pins are used for LCD driving. Note that the

Port Control register does not need to first setup the pins

as outputs to enable the LCD driver operation.

SCOMEN

COMnEN

Pin Function

O/P Level

I/O

0or1

I/O

0or1

SCOMn

VDD/2

Output Control

LCD Bias Control

The LCD COM driver enables a range of selections to

be provided to suit the requirement of the LCD panel

which is being used. The bias resistor choice is imple-

mented using the ISEL1 and ISEL0 bits in the SCOMC

V D D

V L V D

L V D E N

L V D O

t L V D S

LVD Operation

V D D

S C O M 0 ~

S C O M 3

S C O M E N

C O M n E N

V D D / 2

S C O M o p e r a t i n g c u r r e n t

LCD COM Bias

HT68F20 Datasheet(PDF) 165 Page - Holtek Semiconductor Inc

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