HT82A620R datasheet(39/72 Pages) HOLTEK

39 / 72 page

HT82A520R/HT82A620R

Rev.1.00

October 23, 2009

D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

S B D R ( R e c e i v e d D a t a R e g i s t e r )

S D O B u f f e r

M L S

D a t a B u s

M a s t e r o r S l a v e

S D I

S D O

I n t e r n a l B a u d R a t e C l o c k

S C K

C l o c k P o l a r i t y

C 2

C 1

C 0

S B E N

I n t e r n a l B u s y F l a g

S B E N

W r i t e S B D R

W C O L F l a g

T R F

a n d , s t a r t

S B E N

E N

A N D

W r i t e S B D R

W r i t e S B D R E n a b l e / D i s a b l e

S C S

E N

M a s t e r o r S l a v e

C S E N

S B E N

a n d , s t a r t

SPI Block Diagram

Note:

WCOL: set by SPI cleared by users

CSEN: enable/disable chip selection function pin

master mode: 1/0 = with/without SCS output function

Slave mode: 1/0 = with/without SCS input control function

SBEN: enable/disable serial bus (0: initialise all status flags)

when SBEN=0, all status flags should be initialised

when SBEN=1, all SPI related function pins should stay at floating state

TRF: 1 = data transmitted or received, 0= data is transmitting or still not received

CPOL: I/O = clock polarity rising/falling edge: For SPIR Register.

If clock polarity set to rising edge (SPI_CPOL=1), serial clock timing follow SCK, otherwise (SPI_CPOL=0)

SCK is the serial clock timing.

Bit No.

Label

R/W

Function

SPI_CPOL

R/W

1: clock polarity rising

0: clock polarity falling (default falling)

SPI_MODE

R/W

0: SPI output the data in the rising edge(polarity=1) or falling edge (polarity=0);

SPI read data in the in the falling edge(polarity=1) or rising edge (polarity=0);

(default)

1: SPI first output the data immediately after the SPI is enable. And SPI output

the data in the falling edge(polarity=1) or rising edge (polarity=0); SPI read data

in the in the rising edge(polarity=1) or falling edge (polarity=0)

SPI_CSEN

R/W

1: SPI_CSEN Enable , this bit is used to enable/disable software CSEN func-

tion

0: SPI_CSEN disable, SCS define as GPIO (default disable)

SPI_EN

R/W

This bit control the shared PIN (SCS, SDI, SDO and SCK) is SPI or GPIO mode

0: I/O mode (default)

1: SPI mode

7~4

Reserved bit

R/W

Always 0

SPIR Register

HT82A620R Datasheet(PDF) 39 Page - Holtek Semiconductor Inc

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