LPC1769 datasheet(6/66 Pages) NXP

6 / 66 page

LPC1769_68_67_66_65_64_4

Product data sheet

Rev. 04 — 1 February 2010

6 of 66

NXP Semiconductors

LPC1769/68/67/66/65/64

32-bit ARM Cortex-M3 microcontroller

Pinning information

6.1 Pinning

6.2 Pin description

Fig 2.

Pin configuration LQFP100 package

LPC176xFBD100

002aad945

Table 3.

Pin description

Symbol

Type

Description

P0[0] to P0[31]

I/O

Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The

operation of port 0 pins depends upon the pin function selected via the pin connect

block. Pins 12, 13, 14, and 31 of this port are not available.

P0[0]/RD1/TXD3/

SDA1

46[1]

I/O

P0[0] — General purpose digital input/output pin.

RD1 — CAN1 receiver input. (LPC1769/68/66/65/64 only).

TXD3 — Transmitter output for UART3.

I/O

SDA1 — I2C1 data input/output. (This is not an I2C-bus compliant open-drain pin).

P0[1]/TD1/RXD3/

SCL1

47[1]

I/O

P0[1] — General purpose digital input/output pin.

TD1 — CAN1 transmitter output. (LPC1769/68/66/65/64 only).

RXD3 — Receiver input for UART3.

I/O

SCL1 — I2C1 clock input/output. (This is not an I2C-bus compliant open-drain pin).

P0[2]/TXD0/AD0[7] 98[2]

I/O

P0[2] — General purpose digital input/output pin.

TXD0 — Transmitter output for UART0.

AD0[7] — A/D converter 0, input 7.

P0[3]/RXD0/AD0[6] 99[2]

I/O

P0[3] — General purpose digital input/output pin.

RXD0 — Receiver input for UART0.

AD0[6] — A/D converter 0, input 6.

P0[4]/

I2SRX_CLK/

RD2/CAP2[0]

81[1]

I/O

P0[4] — General purpose digital input/output pin.

I/O

I2SRX_CLK — Receive Clock. It is driven by the master and received by the

slave. Corresponds to the signal SCK in the I2S-bus specification.

(LPC1769/68/67/66/65 only).

RD2 — CAN2 receiver input. (LPC1769/68/66/65/64 only).

CAP2[0] — Capture input for Timer 2, channel 0.

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