ADE7878 datasheet(85/92 Pages) AD

85 / 92 page

ADE7878

Rev. 0| Page 85 of 92

Table 40. APHCAL, BPHCAL, CPHCAL Registers (Address 0xE614, Address 0xE615, Address 0xE616)

Bit

Location

Bit Name

Default Value

Description

9:0

PHCALVAL

0000000000

If current channel compensation is necessary, these bits can vary only between 0 and 383.

If voltage channel compensation is necessary, these bits can vary only between 512 and 575.

If the PHCALVAL bits are set with numbers between 384 and 511, the compensation behaves

like PHCALVAL set between 256 and 383.

If the PHCALVAL bits are set with numbers between 512 and 1023, the compensation

behaves like PHCALVAL bits set between 384 and 511.

15:10

Reserved

000000

Reserved. These bits do not manage any functionality.

Table 41. PHSIGN Register (Address 0xE617)

Bit

Location

Bit Name

Default Value

Description

AWSIGN

0: if the active power identified by Bit 6 (REVAPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase A is positive.

1: if the active power identified by Bit 6 (REVAPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase A is negative.

BWSIGN

0: if the active power identified by Bit 6 (REVAPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase B is positive.

1: if the active power identified by Bit 6 (REVAPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase B is negative.

CWSIGN

0: if the active power identified by Bit 6 (REVAPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase C is positive.

1: if the active power identified by Bit 6 (REVAPSEL) bit in the ACCMODE[7:0] register (total of

fundamental) on Phase C is negative.

SUM1SIGN

0: if the sum of all phase powers in the CF1 datapath is positive.

1: if the sum of all phase powers in the CF1 datapath is negative. Phase powers in the CF1

datapath are identified by Bits[2:0] (TERMSEL1) of the COMPMODE[15:0] register and by

Bits[2:0] (CF1SEL) of the CFMODE[15:0] register.

AVARSIGN

0: if the reactive power identified by Bit 7 (REVRPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase A is positive.

1: if the reactive power identified by Bit 7 (REVRPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase A is negative.

BVARSIGN

0: if the reactive power identified by Bit 7 (REVRPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase B is positive.

1: if the reactive power identified by Bit 7 (REVRPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase B is negative.

CVARSIGN

0: if the reactive power identified by Bit 7 (REVRPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase C is positive.

1: if the reactive power identified by Bit 7 (REVRPSEL) in the ACCMODE[7:0] register (total of

fundamental) on Phase C is negative.

SUM2SIGN

0: if the sum of all phase powers in the CF2 datapath is positive.

1: if the sum of all phase powers in the CF2 datapath is negative. Phase powers in the CF2

datapath are identified by Bits[5:3] (TERMSEL2) of the COMPMODE[15:0] register and by

Bits[5:3] (CF2SEL) of the CFMODE[15:0] register.

SUM3SIGN

0: if the sum of all phase powers in the CF3 datapath is positive.

1: if the sum of all phase powers in the CF3 datapath is negative. Phase powers in the CF3

datapath are identified by Bits[8:6] (TERMSEL3) of the COMPMODE[15:0] register and by

Bits[8:6] (CF3SEL) of the CFMODE[15:0] register.

15:9

Reserved

000 0000

Reserved. These bits are always 0.

ADE7878 Datasheet(PDF) 85 Page - Analog Devices

ADE7878 Datasheet(HTML) 85 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL