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AS5030 Datasheet(PDF) 11 Page - ams AG |
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AS5030 Datasheet(HTML) 11 Page - ams AG |
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11 / 33 page ![]() AS5030 8-bit Programmable Magnetic Rotary Encoder Rev. 1.8 www.austriamicrosystems.com Page 11 of 33 4.16 Serial 2-wire Continuous Readout The termination of each readout sequence by a timeout of CLK after the 22nd clock pulse as described in 4.15 is the safest method to ensure synchronization, as each timeout of CLK resets the serial interface. However, it is not mandatory to apply a timeout of CLK and consequently synchronization after each reading. It is also possible to read several consecutive angle values without synchronization by simply continuing the CLK pulses without timeout after the 22nd clock. The 23rd clock is equal to the 1st clock of the next measurement, etc… This is the fastest way to read multiple angle values, as there is no timeout period between the readings. It is still possible to synchronize the serial data transmission by a timeout of CLK after a given number of readouts (e.g. synchronize after every 5th reading, etc…) CMD4 CLK CS DIO read t0 t6 command phase data phase DIO write t1 1 2 3 4 567 22 DX 8 CMD2 CMD3 CMD1 CMD0 D15 D14 D0 t5 23 24 25 CMD4 CMD2 CMD3 1st reading 2nd reading command phase Figure 10: Timing diagram in 2-wire SSI continuous readout 4.17 Serial 2-Wire Differential SSI Connection With the addition of a RS-422 / RS- 485 transceiver, a fully differential data transmission, according to the 21-bit SSI interface standard is possible. To be compatible with this standard, the CLK signal must be inverted. This is done by reversing the Data+ and Data- lines of the transceivers. Note: This type of transmission is read-only. Figure 11: 2-wire SSI read-only mode Figure 12: Timing diagram in 2-wire readonly mode (differential transmission) SSI read-only serial bit sequence (21bit read): Read D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 AGC Angle 0 0 0 0 0 C2 lock D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 AS5030 Micro Controller 100n CS CLK DIO +5V VDD VSS VSS C2 VDD VDD 13 11 10 12 15 C1 VSS 3 14 Input Output DX 9 CLK DI D+ D- D+ D- MAX 3081 or similar D+ D- D- D+ |
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