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DM9000EP Datasheet(PDF) 2 Page - Davicom Semiconductor, Inc. |
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DM9000EP Datasheet(HTML) 2 Page - Davicom Semiconductor, Inc. |
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2 / 2 page ![]() Specifications ■ Supports processor interface: byte/word/dword of I/O command to internal memory data operation ■ Integrated 10/100M transceiver ■ Supports MII and reverses MII interface ■ Supports back pressure mode for half-duplex mode flow control ■ IEEE802.3x flow control for full-duplex mode ■ Supports wakeup frame, link status change and magic packet events for remote wake up ■ Integrated 4K dword SRAM ■ Supports automatically load vendor ID and product ID from EEPROM ■ Supports 4 GPIO pins ■ Optional EEPROM configuration ■ Very low power consumption mode: – Power reduced mode (cable detection) – Power down mode – Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction. ■ Compatible with 3.3V and 5.0V tolerant I/O ■ 100-pin LQFP with CMOS process Application VoIP CPE (ATA, IP Phone, Video Phone) IP STB, IPC, Internet Radio Ordering Information Part Number Pin Count Package DM9000E 100 LQFP DM9000EP 100 LQFP (Pb-Free) DAVICOM Semiconductor, Inc. No.6, Li-Hsin Rd.VI, Science Park, Hsin-Chu, Taiwan, R.O.C. TEL: 886-3-5798797 FAX: 886-3-5646929 E-mail: sales@davicom.com.tw |
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