Specifications

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100-pin LQFP.

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Supports processor interface: Byte/word/Dword of I/O command to internal memory

data operation

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Integrated 10/100M transceiver with

HP Auto-MDIX

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Supports MII and reverses MII interface

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Supports back pressure mode for half-duplex mode flow control

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IEEE802.3x flow control for full-duplex mode

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Supports wakeup frame, link status change and magic packet events for remote wake up

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Integrated 16K Byte SRAM

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Build in 3.3V to 2.5V regulator

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Supports early Transmit

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Supports IP/TCP/UDP checksum generation and checking

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Supports automatically load vendor ID and

product ID from EEPROM

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Supports 7 or 23 GPIO pins

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Optional EEPROM configuration

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Very low power consumption mode:

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Power reduced mode (cable detection)

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Power down mode

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Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.

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1: 1 transformers only when HP Auto-MDIX Enable .

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Compatible with 3.3V and 5.0V tolerant I/O

Application

VoIP CPE (ATA, IP Phone, Video Phone)

IP STB, IPC, Internet Radio

Ordering Information

Part Number

Pin Count

Package

DM9010E

100

LQFP

DM9010EP

100

LQFP(Pb-Free)

DAVICOM Semiconductor, Inc.

No.6, Li-Hsin Rd.VI, Science Park, Hsin-Chu, Taiwan, R.O.C.

TEL: 886-3-5798797

FAX: 886-3-5646929