DM9161EP datasheet(3/50 Pages) DAVICOM

3 / 50 page

DM9161

10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver

Final

Version: DM9161-DS-F05

September 10, 2008

9.4.14 Auto-negotiation and Fast Link Pulse Timing

Parameters..................................................37

9.4.15 Auto-negotiation and Fast Link Pulse Timing

Diagram.......................................................38

9.4.16 RMII Receive Timing Diagram ....................38

9.4.17 RMII Transmit Timing Diagram ...................39

9.4.18 RMII Timing Diagram...................................40

9.4.19 RMII Timing Parameter ...............................40

10. Application Notes..............................................42

10.1 Network Interface Signal Routing...................42

10.2 10Base-T/100Base-TX Application ................42

10.3 10Base-T (Power Reduction Application) ......43

10.4 Power Decoupling Capacitors ........................44

10.5 Ground Plane Layout......................................45

10.6 Power Plane Partitioning ................................46

10.7 Magnetics Selection Guide.............................47

10.8 Crystal Selection Guide ..................................48

11. Package Information.........................................49

12.Order Information ..............................................50

DM9161EP Datasheet(PDF) 3 Page - Davicom Semiconductor, Inc.