TSM2N70 datasheet(2/7 Pages) TSC

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Preliminary

TSM2N70

700V N-Channel Power MOSFET

2/7

Version: Preliminary

Thermal Performance

Parameter

Symbol

Limit

Unit

Thermal Resistance - Junction to Case

RӨJC

2.78

oC/W

Thermal Resistance - Junction to Ambient

RӨJA

100

oC/W

Notes: Surface mounted on FR4 board t ≤ 10sec

Electrical Specifications (Ta = 25oC unless otherwise noted)

Parameter

Conditions

Symbol

Min

Typ

Max

Unit

Static

Drain-Source Breakdown Voltage

VGS = 0V, ID = 1mA

BVDSS

700

Drain-Source On-State Resistance

VGS = 10V, ID = 0.8A

RDS(ON)

Gate Threshold Voltage

VDS = VGS, ID = 50uA

VGS(TH)

3.0

4.5

Zero Gate Voltage Drain Current

VDS = 700V, VGS = 0V

IDSS

Gate Body Leakage

VGS = ±20V, VDS = 0V

IGSS

±10

Forward Transconductance

VDS = 15V, ID = 0.8A

gfs

1.4

Diode Forward Voltage

IS = 1.6A, VGS = 0V

VSD

1.6

Dynamic

Total Gate Charge

11.4

Gate-Source Charge

Qgs

Gate-Drain Charge

VDS = 560V, ID = 0.8A,

VGS = 10V

Qgd

6.8

Input Capacitance

Ciss

280

Output Capacitance

Coss

Reverse Transfer Capacitance

VDS = 25V, VGS = 0V,

f = 1.0MHz

Crss

6.5

Switching

Turn-On Delay Time

td(on)

Turn-On Rise Time

Turn-Off Delay Time

td(off)

Turn-Off Fall Time

VGS = 10V, ID = 0.8A,

VDD = 350V, RG = 4.7Ω

Reverse Recovery Time

tfr

334

Reverse Recovery Charge

Qfr

918

Reverse Recovery Current

VGS = 0V, IS = 13A,

VDD = 50V

dIF/dt = 100A/us

IRRM

5.5

Notes:

1. Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature

2. VDD = 50V, IAS=13A, L=8mH, RG=25Ω

3. Pulse test: pulse width ≤300uS, duty cycle ≤1.5%

4. Essentially Independent of Operating Temperature

5. For design reference only, not subject to production testing.

6. Switching time is essentially independent of operating temperature.

TSM2N70 Datasheet(PDF) 2 Page - Taiwan Semiconductor Company, Ltd

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