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HT82D22R Datasheet(PDF) 21 Page - Holtek Semiconductor Inc |
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HT82D22R Datasheet(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 41 page ![]() HT82D22R/HT82D22A Rev. 1.10 21 January 27, 2010 The bitmaps are list as follows : Register Name R/W Register Address Bit7~Bit3 Reserved Bit 2 Bit 1 Bit 0 Default Value PIPE_CTRL R/W 01000001B ¾ Pipe 2 Pipe 1 Pipe 0 00000110 STALL R/W 01000011B ¾ Pipe 2 Pipe 1 Pipe 0 00000110 PIPE R 01000100B ¾ Pipe 2 Pipe 1 Pipe 0 00000000 Endpt_EN R/W 01000001B ¾ Pipe 2 Pipe 1 Pipe 0 00000111 PIPE_CTRL (41H), STALL (43H), PIPE (44H) and Endpt_EN (47H) Registers The SIES Register is used to indicate the present signal state which the SIE receives and also defines whether the SIE has to change the device address automatically. Bit No. Function Read/Write Register Address 7 MNI R/W 01000001B 6~2 ¾¾ 1 F0_ERR R/W 0 Adr_set R/W SIES (45H) Register Table Function Name Read/ Write Description Adr_set R/W This bit is used to configure the USB SIE to automatically change the device address with the value of the Address+Remote_WakeUp Register (42H). When this bit is set to 1 by F/W, the USB SIE will update the device address with the value of the Address+Remote_WakeUp Register (42H) after the PC Host has successfully read the data from the device by the IN operation. The USB SIE will clear the bit after updating the device ad- dress. Otherwise, when this bit is cleared to 0, the USB SIE will update the device address im- mediately after an address is written to the Address+Remote_WakeUp Register (42H). F0_Err R/W This bit is used to indicate when there are some errors that occurred when the FIFO0 is ac- cessed. This bit is set by the USB SIE and cleared by F/W. ¾¾ Bit 2~Bit 6 Reserved bit R/W This bit is used to control whether the USB interrupt is output to the MCU in NAK respon. SIES Function Table The MISC register is actually a command + status to control the desired FIFO action and to show the status of the de- sired FIFO. Every bit ¢s meaning and usage are listed as follows: Bit No. Function Read/Write Register Address 7 Len0 R/W 01000110B 6 Ready R 5 SCMD R/W 4 SELP1 R/W 3 SELP0 R/W 2 Clear R/W 1 Tx R/W 0 REQ R/W MISC (46H) Registers Table |
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